On 24 January 2013 17:13, Uwe Kleine-König
<u.kleine-koenig@xxxxxxxxxxxxxx> wrote:
> On Thu, Jan 24, 2013 at 04:47:53PM +0530, Viresh Kumar wrote:
>> So, the whole loop is for 9 pulses at max and it runs 18 times. Twice per
>> clock. With my code, i only check for sda after supplying full clock pulse,
>> and you are asking me to check that in middle of clock. Isn't it wrong?
> Actually in the data phase of a transfer sda only changes when scl is
> low. (Otherwise it's a stop condition.) So it should make sense to check
> after pulling scl low, doesn't it? Hmm, it trades one ndelay for
> (possibly several) get_sda. hmm, *shrug*.
In any case, we have to make scl high again. So, why not check it at
that stage only?
>> >> +int i2c_generic_scl_recovery(struct i2c_adapter *adap)
>> >> +{
>> >> + adap->bus_recovery_info->set_scl(adap, 1);
>> > Why this?
>>
>> This came out of some earlier discussion we had. We should start
>> with high and then do low-high 9 times.
> Ah, I missed the first val = !val and so thought you start with setting
> to 1 anyhow. So yes, I agree. Maybe document this assumption in a
> comment?
Some sort of comment is present in the routine which toggles the line,
which says "by this time scl must be high and we should apply 9 pulses
now"
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