Re: [PATCH] Fix I2C combined access on Marvell mv64xxxx

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Hello, Ben,

Are you going to integrate Marvel's i2c patches dated March 31 to the
kernel tree?

Thank you for your help
Konstantin

On Thu, Mar 31, 2011 at 5:40 PM, Konstantin Porotchkin
<kostap@xxxxxxxxxxx> wrote:
> Eliminate erroneus data send in combined access mode when INT
> is cleared in i2c controller. Instead disable INT delivery to CPU
> and re-enable it on the next START.
>
> Signed-off-by: Konstantin Porotchkin <kostap@xxxxxxxxxxx>
> ---
> Âdrivers/i2c/busses/i2c-mv64xxx.c | Â 19 +++++++++++++++----
> Â1 files changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
> index a9941c6..d013e25 100644
> --- a/drivers/i2c/busses/i2c-mv64xxx.c
> +++ b/drivers/i2c/busses/i2c-mv64xxx.c
> @@ -15,6 +15,7 @@
> Â#include <linux/spinlock.h>
> Â#include <linux/i2c.h>
> Â#include <linux/interrupt.h>
> +#include <linux/delay.h>
> Â#include <linux/mv643xx_i2c.h>
> Â#include <linux/platform_device.h>
> Â#include <linux/io.h>
> @@ -98,6 +99,7 @@ struct mv64xxx_i2c_data {
>    Âint           rc;
> Â Â Â Âu32 Â Â Â Â Â Â Â Â Â Â freq_m;
> Â Â Â Âu32 Â Â Â Â Â Â Â Â Â Â freq_n;
> +    int           irq_disabled;
>    Âwait_queue_head_t    waitq;
>    Âspinlock_t       Âlock;
>    Âstruct i2c_msg     Â*msg;
> @@ -239,10 +241,11 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
> Â{
> Â Â Â Âswitch(drv_data->action) {
> Â Â Â Âcase MV64XXX_I2C_ACTION_SEND_RESTART:
> - Â Â Â Â Â Â Â drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_START;
> - Â Â Â Â Â Â Â drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
> - Â Â Â Â Â Â Â writel(drv_data->cntl_bits,
> - Â Â Â Â Â Â Â Â Â Â Â drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
> + Â Â Â Â Â Â Â /* can't mask interrupts by clearing the INTEN as this
> + Â Â Â Â Â Â Â Â* triggers the controller to send the data.
> + Â Â Â Â Â Â Â Â*/
> + Â Â Â Â Â Â Â drv_data->irq_disabled = 1;
> + Â Â Â Â Â Â Â disable_irq_nosync(drv_data->irq);
> Â Â Â Â Â Â Â Âdrv_data->block = 0;
> Â Â Â Â Â Â Â Âwake_up_interruptible(&drv_data->waitq);
> Â Â Â Â Â Â Â Âbreak;
> @@ -255,6 +258,11 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
> Â Â Â Âcase MV64XXX_I2C_ACTION_SEND_START:
> Â Â Â Â Â Â Â Âwritel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START,
> Â Â Â Â Â Â Â Â Â Â Â Âdrv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
> + Â Â Â Â Â Â Â if (drv_data->irq_disabled) {
> + Â Â Â Â Â Â Â Â Â Â Â udelay(3);
> + Â Â Â Â Â Â Â Â Â Â Â drv_data->irq_disabled = 0;
> + Â Â Â Â Â Â Â Â Â Â Â enable_irq(drv_data->irq);
> + Â Â Â Â Â Â Â }
> Â Â Â Â Â Â Â Âbreak;
>
> Â Â Â Âcase MV64XXX_I2C_ACTION_SEND_ADDR_1:
> @@ -327,6 +335,8 @@ mv64xxx_i2c_intr(int irq, void *dev_id)
> Â Â Â Â Â Â Â Âmv64xxx_i2c_fsm(drv_data, status);
> Â Â Â Â Â Â Â Âmv64xxx_i2c_do_action(drv_data);
> Â Â Â Â Â Â Â Ârc = IRQ_HANDLED;
> + Â Â Â Â Â Â Â if (drv_data->state == MV64XXX_I2C_STATE_WAITING_FOR_RESTART)
> + Â Â Â Â Â Â Â Â Â Â Â break;
> Â Â Â Â}
> Â Â Â Âspin_unlock_irqrestore(&drv_data->lock, flags);
>
> @@ -553,6 +563,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
> Â Â Â Â Â Â Â Ârc = -ENXIO;
> Â Â Â Â Â Â Â Âgoto exit_unmap_regs;
> Â Â Â Â}
> + Â Â Â drv_data->irq_disabled = 0;
> Â Â Â Âdrv_data->adapter.dev.parent = &pd->dev;
> Â Â Â Âdrv_data->adapter.algo = &mv64xxx_i2c_algo;
> Â Â Â Âdrv_data->adapter.owner = THIS_MODULE;
> --
> 1.7.4.1
>
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