On Thu, Apr 28, 2011 at 4:36 PM, Eric Miao <eric.y.miao@xxxxxxxxx> wrote: > On Thu, Apr 28, 2011 at 4:22 PM, Jean Delvare <khali@xxxxxxxxxxxx> wrote: >> Hi Haojian, >> >> On Thu, 28 Apr 2011 12:02:36 +0800, Haojian Zhuang wrote: >>> Both AP and CP are contained in Marvell PXA910 silicon. These two ARM >>> cores are sharing one pair of I2C pins. >>> >>> In order to keep I2C transaction operated with atomic, hardware lock >>> (RIPC) is required. Because of this, bus lock in AP side can't afford >>> this requirement. Now hardware lock is appended. >> >> I have no objection to the idea, but one question: when using the >> hardware lock, isn't the software mutex redundant? I would expect that >> you call the hardware_lock/unlock functions _instead_ of >> rt_mutex_lock/unlock, rather than in addition to it. Or do you still >> need the rt_mutex to prevent priority inversion? >> > > Jean, > > It's actually not redundant. The hardware lock is used to protect > access to the same register regions between two processors (AP > and CP so called), while the software lock is used to protect > access from within the AP side. > Jean, It's not redundant. Reading RIPC register will try to get the lock. We're always using __raw_readl() API to read register. I think the read operation couldn't be atomic and finished in one instruction cycle. If two processes in AP side try to get the RIPC lock with __raw_readl(), it may result dead lock. If we fetch the RIPC lock behind software bus lock, it's safe. If process on AP try to get the RIPC lock and compete with CP, it won't be an issue. It should always be atomic. -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
