Re: [PATCH 01/10] i2c-designware: Allow mixed endianness accesses

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On 02/03/2011 11:19 AM, dirk.brandewie@xxxxxxxxx wrote:
> @@ -356,24 +393,24 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
>  	u32 ic_con;
>  
>  	/* Disable the adapter */
> -	writel(0, dev->base + DW_IC_ENABLE);
> +	dw_writel(dev, 0, DW_IC_ENABLE);
>  
>  	/* set the slave (target) address */
> -	writel(msgs[dev->msg_write_idx].addr, dev->base + DW_IC_TAR);
> +	dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR);
>  
>  	/* if the slave address is ten bit address, enable 10BITADDR */
> -	ic_con = readl(dev->base + DW_IC_CON);
> +	ic_con = dw_readl(dev, DW_IC_CON);
>  	if (msgs[dev->msg_write_idx].flags & I2C_M_TEN)
>  		ic_con |= DW_IC_CON_10BITADDR_MASTER;
>  	else
>  		ic_con &= ~DW_IC_CON_10BITADDR_MASTER;
> -	writel(ic_con, dev->base + DW_IC_CON);
> +	dw_writel(dev->base, ic_con, DW_IC_CON);

Found a type:
	dw_writel(dev, ic_con, DW_IC_CON);

>  	/* Enable the adapter */
> -	writel(1, dev->base + DW_IC_ENABLE);
> +	dw_writel(dev, 1, DW_IC_ENABLE);
>  
>  	/* Enable interrupts */
> -	writel(DW_IC_INTR_DEFAULT_MASK, dev->base + DW_IC_INTR_MASK);
> +	dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK);
>  }
--
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