On Wed 27 Jan 2010 15:05, Jean Delvare pondered: > Hi Robin, > > On Wed, 27 Jan 2010 14:54:19 -0500, Robin Getz wrote: > > Mark/Jean: > > > > I have a new I2C slave which has 32-bit data/addresses that I'm trying to > > figure out if I can connect up to the i801x chipset... > > > > A read is: > > > > S Addr Wr [A] Comm(31:24) [A] Comm(23:16) [A] Comm(15:8) [A] Comm(7:0) [A] > > S Addr R [A] [Data(31:24)] A [Data(23:16)] A [Data(15:8)] A [Data(7:0)] NA P > > > > A Write is: > > > > S Addr Wr [A] Comm(31:24) [A] Comm(23:16) [A] Comm(15:8) [A] Comm(7:0) [A] > > Data(31:24) [A] Data(23:16) [A] Data(15:8) [A] Data(7:0) [A] P > > > > Comm the 32-bit data which selects the register on the I2C slave. > > > > I can use I2C to do this... > > > > The question is - it doesn't look like the ./drivers/i2c/busses/i2c-i801.c > > supports enough I2C to do this - and I don't think I can abuse SMBus to talk > > to the part. > > > > Would you agree with my speculation? or am I missing some I2C_FUNC_I2C > > somewhere? or some magic way to make SMBUS work? > > Your assumption is correct, the above transactions won't work on the > ICH SMBus. More precisely, writes will work but reads won't. For reads, > you'll need a full-featured I2C master. Thanks for the nak. :) -Robin -- To unsubscribe from this list: send the line "unsubscribe linux-i2c" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
