On Wed, Nov 8, 2023 at 9:27 AM Alexander Graf <graf@xxxxxxxxxx> wrote: > My point with the comment on this patch was "Don't break AMD (or ancient > VMX without instruction length decoding [Does that exist? I know SVM has > old CPUs that don't do it]) please". VM-exit instruction length is not defined for all VM-exit reasons (EPT misconfiguration is one that is notably absent), but the field has been there since Prescott.
