On Sun, Nov 13 2022 at 13:12, Michael Kelley wrote:
> From: Thomas Gleixner <tglx@xxxxxxxxxxxxx> Sent: Sunday, November 13, 2022 1:50 AM
>> On Sat, Nov 12 2022 at 21:55, Michael Kelley wrote:
>> > But I can see the problem with too much getting dragged into the VDSO
>> > builds. If hv_get_raw_timer() is added to hyperv_timer.h, it should
>> > be under #ifdef CONFIG_X86. Adding an #ifdef isn't ideal, and a more
>> > more proper solution might be to have a separate hyperv_timer.h include
>> > file under arch/x86/include/asm. But the latter seems like overkill for just
>> > hv_get_raw_timer(), so I'm OK with the #ifdef.
>>
>> We surely can have asm/hyperv_timer.h but TBH:
>>
>> >> static inline notrace u64
>> >> hv_read_tsc_page_tsc(const struct ms_hyperv_tsc_page *tsc_pg, u64 *cur_tsc)
>> >> {
>>
>> hv_read_tsc_page_tsc() does not look architecture agnostic either. TSC
>> is pretty x86 specific :)
>
> Yes, the naming still says "tsc". But there's nothing in the code that actually
> requires the TSC if hv_get_raw_timer() maps to some other hardware counter on
> a different architecture. That's why the hv_get_raw_timer() abstraction is there
> in the first place. If we didn't care about x86-isms, hv_read_tsc_page_tsc() would
> just directly invoke rdtsc_ordered().
Not really intuitive, but anyway...
