On 02/03/2021 22:38, Michael Kelley wrote: > STIMER0 interrupts are most naturally modeled as per-cpu IRQs. But > because x86/x64 doesn't have per-cpu IRQs, the core STIMER0 interrupt > handling machinery is done in code under arch/x86 and Linux IRQs are > not used. Adding support for ARM64 means adding equivalent code > using per-cpu IRQs under arch/arm64. > > A better model is to treat per-cpu IRQs as the normal path (which it is > for modern architectures), and the x86/x64 path as the exception. Do this > by incorporating standard Linux per-cpu IRQ allocation into the main > SITMER0 driver code, and bypass it in the x86/x64 exception case. For > x86/x64, special case code is retained under arch/x86, but no STIMER0 > interrupt handling code is needed under arch/arm64. > > No functional change. > > Signed-off-by: Michael Kelley <mikelley@xxxxxxxxxxxxx> Acked-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> [ ... ] -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
