From: Boqun Feng <boqun.feng@xxxxxxxxx> Sent: Monday, February 22, 2021 10:47 PM
>
> On Wed, Jan 27, 2021 at 12:23:45PM -0800, Michael Kelley wrote:
> > STIMER0 interrupts are most naturally modeled as per-cpu IRQs. But
> > because x86/x64 doesn't have per-cpu IRQs, the core STIMER0 interrupt
> > handling machinery is done in code under arch/x86 and Linux IRQs are
> > not used. Adding support for ARM64 means adding equivalent code
> > using per-cpu IRQs under arch/arm64.
> >
> > A better model is to treat per-cpu IRQs as the normal path (which it is
> > for modern architectures), and the x86/x64 path as the exception. Do this
> > by incorporating standard Linux per-cpu IRQ allocation into the main
> > SITMER0 driver code, and bypass it in the x86/x64 exception case. For
> > x86/x64, special case code is retained under arch/x86, but no STIMER0
> > interrupt handling code is needed under arch/arm64.
> >
> > No functional change.
> >
> > Signed-off-by: Michael Kelley <mikelley@xxxxxxxxxxxxx>
> > ---
> > arch/x86/hyperv/hv_init.c | 2 +-
> > arch/x86/include/asm/mshyperv.h | 4 -
> > arch/x86/kernel/cpu/mshyperv.c | 10 +--
> > drivers/clocksource/hyperv_timer.c | 170 +++++++++++++++++++++++++------------
> > include/asm-generic/mshyperv.h | 5 --
> > include/clocksource/hyperv_timer.h | 3 +-
> > 6 files changed, 123 insertions(+), 71 deletions(-)
> >
[snip]
> > +static void hv_remove_stimer0_irq(void)
> > +{
> > + if (stimer0_irq != -1) {
> > + free_percpu_irq(stimer0_irq, stimer0_evt);
> > + free_percpu(stimer0_evt);
> > + acpi_unregister_gsi(stimer0_irq);
> > + stimer0_irq = -1;
> > + }
>
> I think we need:
>
> else {
> hv_remove_stimer0_handler();
> }
>
> here?
>
> Because previously, on x86 we set hv_stimer0_handler to NULL in
> hv_remove_stimer0_irq(), however, this patch doesn't keep this behavior
> any more.
>
> Thoughts?
>
> Regards,
> Boqun
Yes, agreed. Will fix this in v2.
Michael
