On Sat, 2020-10-24 at 22:35 +0100, David Woodhouse wrote: > Fix the conditions for enabling x2apic on guests without interrupt > remapping, and support 15-bit Extended Destination ID to allow 32768 > CPUs without IR on hypervisors that support it. > > Make the I/OAPIC code generate its RTE directly from the MSI message > created by the parent irqchip, and fix up a bunch of magic mask/shift > macros to use bitfields for MSI messages and I/OAPIC RTEs while we're > at it. Forgot to mention (since I thought I'd posted it in a previous series) that v3 also ditches irq_remapping_get_irq_domain() and some icky special cases of hard-coding "x86_vector_domain", and makes HPET and I/OAPIC use irq_find_matching_fwspeC() to find their parent irqdomain. > v3: > • Lots of bitfield cleanups from Thomas. > • Disable hyperv-iommu if 15-bit extension is present. > • Fix inconsistent CONFIG_PCI_MSI/CONFIG_GENERIC_MSI_IRQ in hpet.c > • Split KVM_FEATURE_MSI_EXT_DEST_ID patch, half of which is going upstream > through KVM tree (and the other half needs to wait, or have an #ifdef) so > is left at the top of the tree. > > v2: > • Minor cleanups. > • Move __irq_msi_compose_msg() to apic.c, make virt_ext_dest_id static. > • Generate I/OAPIC RTE directly from parent irqchip's MSI messages. > • Clean up HPET MSI support into hpet.c now that we can.
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