On Sat, Aug 22 2020 at 20:05, Jason Gunthorpe wrote: > On Sat, Aug 22, 2020 at 03:34:45AM +0200, Thomas Gleixner wrote: > As a silicon design it might work, but it means existing devices can't > be used with this dev_msi. It is also the sort of thing that would > need a standard document to have any hope of multiple vendors fitting > into it. Eg at PCI-SIG or something. Fair enough. >> If you don't do that then you simply can't write to that space from the >> CPU and you have to transport this kind information always via command >> queues. > > Yes, exactly. This is part of the architectural design of the device, > has been for a long time. Has positives and negatives. As always and it clearly follows the general HW design rule "we can fix that in software". >> > I suppose the core code could provide this as a service? Sort of a >> > varient of the other lazy things above? >> >> Kinda. That needs a lot of thought for the affinity setting stuff >> because it can be called from contexts which do not allow that. It's >> solvable though, but I clearly need to stare at the corner cases for a >> while. > > If possible, this would be ideal, as we could use the dev_msi on a big > installed base of existing HW. I'll have a look, but I'm surely not going to like the outcome. Thanks, tglx