On 7/4/2024 5:24 PM, Greg KH wrote:
Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
On Thu, Jul 04, 2024 at 11:16:24AM +0000, Akshay Gupta wrote:
- RMI device supports v21 on Turin, which has increased register set.
Hence, requires 2byte for register addressing.
- Both Genoa and Turin processors are SP5 compatible, often CPUs are
interchanged on the base boards with BMC remaining the same.
Hence, we need to identify correct regmap configuration. A mechanism
was not defined to identify the RMI register address width.
- The address width can only be determined if the socket is powered ON.
- This patch also addresses CPUID and MCAMSR register read protocol,
the modification is due to the increase in register address size and
the modified thread input.
When you have to list all of the different things you did in a single
change, that's a huge hint that it needs to be split up.
Remember, each patch can only do _one_ thing.
Would you want to review something that attempted to do all of this at
once?
thanks,
greg k-h
I will split and resubmit,
thanks, Akshay
