Configuration register bit 5 must read 0 for all JC42.4 compliant chips.
Several capability register bits must be set for all TSE2004 compliant
chips. Use that information to strengthen the detect function.
Signed-off-by: Guenter Roeck <linux@xxxxxxxxxxxx>
---
drivers/hwmon/jc42.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c
index 1180af1b1638..a260cff750a5 100644
--- a/drivers/hwmon/jc42.c
+++ b/drivers/hwmon/jc42.c
@@ -413,7 +413,11 @@ static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
if (cap < 0 || config < 0 || manid < 0 || devid < 0)
return -ENODEV;
- if ((cap & 0xff00) || (config & 0xf800))
+ if ((cap & 0xff00) || (config & 0xf820))
+ return -ENODEV;
+
+ if ((devid & TSE2004_DEVID_MASK) == TSE2004_DEVID &&
+ (cap & 0x00e7) != 0x00e7)
return -ENODEV;
for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
--
2.39.2
