On Thu, 2024-04-25 at 10:13 -0700, Ricardo Neri wrote:
> The TCC offset field in the register MSR_TEMPERATURE_TARGET is not
> architectural. The TCC library provides a model-specific bitmask. Use
> it to
> determine the maximum TCC offset.
>
> Suggested-by: Zhang Rui <rui.zhang@xxxxxxxxx>
> Signed-off-by: Ricardo Neri <ricardo.neri-calderon@xxxxxxxxxxxxxxx>
Reviewed-by: Zhang Rui <rui.zhang@xxxxxxxxx>
-rui
> ---
> Cc: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
> Cc: Lukasz Luba <lukasz.luba@xxxxxxx>
> Cc: Srinivas Pandruvada <srinivas.pandruvada@xxxxxxxxxxxxxxx>
> Cc: linux-hwmon@xxxxxxxxxxxxxxx
> Cc: linux-pm@xxxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx
> Cc: stable@xxxxxxxxxxxxxxx # v6.7+
> ---
> Changes since v1:
> * Used renamed function intel_tcc_get_offset_mask().
> ---
> drivers/thermal/intel/intel_tcc_cooling.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/thermal/intel/intel_tcc_cooling.c
> b/drivers/thermal/intel/intel_tcc_cooling.c
> index 6c392147e6d1..5bfc2b515c78 100644
> --- a/drivers/thermal/intel/intel_tcc_cooling.c
> +++ b/drivers/thermal/intel/intel_tcc_cooling.c
> @@ -20,7 +20,7 @@ static struct thermal_cooling_device *tcc_cdev;
> static int tcc_get_max_state(struct thermal_cooling_device *cdev,
> unsigned long
> *state)
> {
> - *state = 0x3f;
> + *state = intel_tcc_get_offset_mask();
> return 0;
> }
>
