On Tue, Apr 16, 2024 at 10:22:11AM +0800, Delphine CC Chiu wrote: > Since the value for PWMOUT Target Duty Cycle register is a 9 bit > left-justified value that ranges from 0 to 511 and is contained in 2 > bytes. > > There is an issue that the PWM signal recorded by oscilloscope would > not be on consistently if we set PWM to 100% to the driver. > > It is because the LSB of the 9 bit would always be zero if it just > left shift 8 bit for the value that write to PWMOUT Target Duty > Cycle register. > > Therefore, revise the scale of the value that was written to pwm input > from 255 to 511 and modify the value to left-justified value. > > Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@xxxxxxxxxx> Applied. Thanks, Guenter
