On Sun, Apr 28, 2024 at 04:06:35PM +1000, Frank Crawford wrote:
> Major part of the change for the new method to avoid chipset issues.
>
> The actual update does the following:
>
> 1) Lock the memory, but does not perform a SIO entry (previously it
> would have performed an SIO entry).
>
> 2) Attempt to read the chipID. This should be safe no matter which
> chip we have.
>
> 3) If step (2) fails, then perform SIO entry and retry chipID read. For
> older chips and on failure it acts similarly to prior to this patch.
>
> 4) Set the sio_data->type, similar to previously.
>
> 5) If we have not performed an SIO entry, and this is not a chip type
> with the NOCONF feature, then it will perform an SIO entry at this
> point.
>
> 6) Proceed with setup as prior to this patch.
>
> 7) Any following access to the SIO registers will invoke the SIO entry
> and SIO exit steps unless it is a chip with the NOCONF feature set.
> This was set up in the previous patches in this patchset.
>
> 8) Update to the exit based on if it had performed a SIO entry or not.
>
> Signed-off-by: Frank Crawford <frank@xxxxxxxxxxxxxxxxxx>
Ah, checkpatch is useful.
> + * ChipIDs 0x8733, 0x8695 (early ID for IT87952E) and 0x8790 are intialised
^^^^^^^^^^
No need to resend, but please run checkpatch on future patches.
Thanks,
Guenter
