On Sat, 2024-04-27 at 18:33 +1000, Frank Crawford wrote: > On various Gigabyte boards, incorrectly entering configuration mode > causes the second Super-IO chip to generate LPC bus access errors. > This was preivously fixed by ensuring that the second chip receives > the > code to enter configuration mode before the first chip. > > On discussion with people who have access to the specification > documents > it was noted that this is wrong, and you should not enter or leave > configuration mode for the second chip, as it is enable during > initialisation and should not be changed. > > In particular, this was found to be the case on the Gigabyte X670E > Aorus > Master board, where it was reporting a totally wrong chip ID (0x8883) > using the previous method. This was corrected by not entering > configuration mode, and this has been found to still work with older > boards. > > --- Sorry, I forgot to add what the changes are since v1: - renamed the feature to FEAT_NOCONF and macro to has_noconf. - reworked patch descriptions to be more explicit about the actions and remove any reference to the BIOS. There is no code changes of any significance. > Frank Crawford (4): > Rename FEAT_CONF_NOEXIT to FEAT_NOCONF as more descriptive of > requirement > Do not enter configuration mode for some chiptypes > Test for chipset before entering configuration mode > Remove tests nolonger required > > drivers/hwmon/it87.c | 127 +++++++++++++++++++++-------------------- > -- > 1 file changed, 61 insertions(+), 66 deletions(-) >
