Since the value for PWMOUT Target Duty Cycle register is a 9 bit left-justified value that ranges from 0 to 511 and is contained in 2 bytes. There is an issue that the LSB of the 9 bit would always be zero if it just left shift 8 bit for the value that write to PWMOUT Target Duty Cycle register. Therefore, revise the scale of the value that was writen to pwm input from 255 to 511 and modify the value to left-justified value. Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@xxxxxxxxxx> --- drivers/hwmon/max31790.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/hwmon/max31790.c b/drivers/hwmon/max31790.c index 3dc95196b229..bd201191da1c 100644 --- a/drivers/hwmon/max31790.c +++ b/drivers/hwmon/max31790.c @@ -49,6 +49,9 @@ #define NR_CHANNEL 6 +#define PWM_INPUT_SCALE 255 +#define MAX31790_REG_PWMOUT_SCALE 511 + /* * Client data (each client gets its own) */ @@ -343,10 +346,12 @@ static int max31790_write_pwm(struct device *dev, u32 attr, int channel, err = -EINVAL; break; } + + val = val * MAX31790_REG_PWMOUT_SCALE / PWM_INPUT_SCALE; data->valid = false; err = i2c_smbus_write_word_swapped(client, MAX31790_REG_PWMOUT(channel), - val << 8); + val << 7); break; case hwmon_pwm_enable: fan_config = data->fan_config[channel]; -- 2.25.1
