Hi,
We have been treating the register MSR_TEMPERATURE_TARGET as a
architectural. It is model-specific.
The registers IA32_[PACKAGE]_THERM_STATUS are architectural. However, they
have become model-specific: in recent processors the temperature readout
occupies bits [23:16] whereas the Intel Software Developer's manual
specifies that it uses [22:16].
Using incorrect bitmasks leads to incorrect temperature readings and
writes to reserved register bits. For instance, temperatures below ~-27C
(depending on the value of TjMax) would be read incorrectly if only the
bits [22:16] of IA32_THERM_[PACKAGE]_STATUS are used.
Update the intel_tcc library to use model-specific bitmasks. Also update
the hwmon/coretemp and intel_tcc_cooling drivers drivers to use the model
checking utilities of intel_tcc.
Updating hwmon/coretemp to use the intel_tcc library required to add a
weak reverse dependency on CONFIG_INTEL_TCC. The less attractive
alternative would be to duplicate the model checking functionality of
intel_tcc in hwmon/coretemp.
I have tested these patches on Alder Lake, Meteor Lake, and Grand Ridge
systems by looking at the temp*_input sysfs files of hwmon.
These patches apply cleanly on top of the `testing` branches of the
linux-pm and hwmon repositories.
Thanks and BR,
Ricardo
Ricardo Neri (3):
thermal: intel: intel_tcc: Add model checks for temperature registers
thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for
TCC offset
hwmon: (coretemp) Use a model-specific bitmask to read registers
drivers/hwmon/Kconfig | 1 +
drivers/hwmon/coretemp.c | 6 +-
drivers/thermal/intel/intel_tcc.c | 177 +++++++++++++++++++++-
drivers/thermal/intel/intel_tcc_cooling.c | 2 +-
include/linux/intel_tcc.h | 8 +
5 files changed, 187 insertions(+), 7 deletions(-)
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2.34.1
