On Mon, Jul 24, 2023 at 10:49:42PM +0200, Peter Zijlstra wrote:
> On Mon, Jul 24, 2023 at 07:44:17PM +0200, Thomas Gleixner wrote:
>
> > +static inline bool topo_subleaf(struct topo_scan *tscan, u32 leaf, u32 subleaf)
> > +{
> > + unsigned int dom, maxtype = leaf == 0xb ? CORE_TYPE + 1 : MAX_TYPE;
> > + struct {
> > + // eax
> > + u32 x2apic_shift : 5, // Number of bits to shift APIC ID right
> > + // for the topology ID at the next level
> > + __rsvd0 : 27; // Reserved
> > + // ebx
> > + u32 num_processors : 16, // Number of processors at current level
> > + __rsvd1 : 16; // Reserved
> > + // ecx
> > + u32 level : 8, // Current topology level. Same as sub leaf number
> > + type : 8, // Level type. If 0, invalid
> > + __rsvd2 : 16; // Reserved
> > + // edx
> > + u32 x2apic_id : 32; // X2APIC ID of the current logical processor
>
> That comment seems inconsistent, either have then all aligned or move
> all register names left.
AMD code seems to have the reg names left aligned -- perhaps do the same
here.
