On Mon, Apr 24, 2023 at 04:20:09PM +0530, Neha Malcom Francis wrote: > Document the binding for TI K3 ESM (Error Signaling Module) block. > > Signed-off-by: Neha Malcom Francis <n-francis@xxxxxx> I think I am missing what this has to do with hardware monitoring. I see a driver submission into drivers/misc, but that doesn't explain the suggested location of the devicetree bindings, and I kind of resist the idea that hwmon should be the dumping ground for bindings which don't have a home. Guenter > --- > .../bindings/hwmon/ti,j721e-esm.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml > > diff --git a/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml b/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml > new file mode 100644 > index 000000000000..c5eb7f46cc46 > --- /dev/null > +++ b/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) 2022 Texas Instruments Incorporated > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/hwmon/ti,j721e-esm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Texas Instruments K3 ESM > + > +maintainers: > + - Neha Malcom Francis <n-francis@xxxxxx> > + > +description: > + The ESM (Error Signaling Module) is an IP block on TI K3 devices > + that allows handling of safety events somewhat similar to what interrupt > + controller would do. The safety signals have their separate paths within > + the SoC, and they are handled by the ESM, which routes them to the proper > + destination, which can be system reset, interrupt controller, etc. In the > + simplest configuration the signals are just routed to reset the SoC. > + > +properties: > + compatible: > + const: ti,j721e-esm > + > + reg: > + maxItems: 1 > + > + ti,esm-pins: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + description: > + integer array of ESM interrupt pins to route to external event pin > + which can be used to reset the SoC. > + minItems: 1 > + maxItems: 255 > + > +additionalProperties: false > + > +required: > + - compatible > + - reg > + - ti,esm-pins > + > +examples: > + - | > + bus { > + #address-cells = <2>; > + #size-cells = <2>; > + esm@700000 { > + compatible = "ti,j721e-esm"; > + reg = <0x0 0x700000 0x0 0x1000>; > + ti,esm-pins = <344>, <345>; > + }; > + };