On 4/28/22 17:28, Ruslan Zalata wrote:
Thank you Guenter for your valuable time. I have added update_interval option (it's in ms units, right?) and fixed all other issues you pointed to. Will test it on real hardware and send third version of the patch for review. Regarding IRQ. Alternatively the driver would need to sit and poll conversion ready bit in a loop which might cause a much worse load on system, is not it ? Anyway, the real problem with this piece of hardware is that there's no "conversion ready bit" provided, the only way to know data ready status is to receive an interrupt.
Not necessarily. The data does not have to be "current", after all, if the hardware is able to continuously convert. If not, the question is how long a conversion takes. If it doesn't take too long, it would be better to initiate a conversion and then wait for the completion.
I think it still needs a semaphore/seqlock to synchronize conversions and reads. I.e. two consequent reads should not return same old value. Although it's not an issue in my case, but could be a problem for others.
Why ? That happens for almost all hwmon devices. They will all report the most recent conversion value. Some of them can take seconds to complete a new conversion, so the reported value is always "old" for a given defition of old (ie any time smaller than a conversion interval). Sigh. Looks like I'll have to dig up the documentation and read about the ADC myself. Guenter
