On Tue, Apr 26, 2022 at 11:04:30PM PDT, Krzysztof Kozlowski wrote:
On 27/04/2022 03:01, Zev Weiss wrote:
These Super I/O chips have an i2c interface that some systems expose
to a BMC; the BMC's device tree can now describe that via this
binding.
Signed-off-by: Zev Weiss <zev@xxxxxxxxxxxxxxxxx>
I already reviewed it so I guess you did not include the tag because of
significant changes?
Yeah, the nuvoton,tsi-channel-mask property is new this round, so I
dropped the previous R-B -- and since it looks like I missed some stuff,
thanks for taking another look (though perhaps some of it could have
been avoided if I'd remembered to run 'make dt_binding_check').
---
.../bindings/hwmon/nuvoton,nct6775.yaml | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml
diff --git a/Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml b/Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml
new file mode 100644
index 000000000000..418477374fdb
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/hwmon/nuvoton,nct6775.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton NCT6775 and compatible Super I/O chips
+
+maintainers:
+ - Zev Weiss <zev@xxxxxxxxxxxxxxxxx>
+
+properties:
+ compatible:
+ enum:
+ - nuvoton,nct6106
+ - nuvoton,nct6116
+ - nuvoton,nct6775
+ - nuvoton,nct6776
+ - nuvoton,nct6779
+ - nuvoton,nct6791
+ - nuvoton,nct6792
+ - nuvoton,nct6793
+ - nuvoton,nct6795
+ - nuvoton,nct6796
+ - nuvoton,nct6797
+ - nuvoton,nct6798
+
+ reg:
+ maxItems: 1
+
+ nuvoton,tsi-channel-mask:
+ description:
+ Bitmask indicating which TSI temperature sensor channels are
+ active. LSB is TSI0, bit 1 is TSI1, etc.
Need a type/ref.
Ack, thanks.
+ maximum: 0xff
+ default: 0
Since by default it is disabled, doesn't it make a required property?
IOW, if you add a node without this mask, will the device operate
properly and usefully?
Yeah, zero active TSI channels is a totally legitimate way for these
devices to operate. TSI is just an optional source of additional
temperature readings that's used on some (AMD) systems; all the basic
Super I/O functionality works fine without it.
Thanks,
Zev
