On Fri, Dec 17, 2021 at 01:40:43PM PST, Guenter Roeck wrote:
On Wed, Nov 10, 2021 at 03:14:39PM -0800, Zev Weiss wrote:
@@ -1490,6 +1516,7 @@ static bool is_word_sized(struct nct6775_data
*data, u16 reg)
(reg & 0x00ff) == 0x55)) ||
(reg & 0xfff0) == 0x630 ||
reg == 0x402 ||
+ (reg >= 0x409 && reg <= 0x419 && (reg & 1)) ||
reg == 0x640 || reg == 0x642 ||
((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
reg == 0x73 || reg == 0x75 || reg == 0x77;
@@ -1497,13 +1524,18 @@ static bool is_word_sized(struct nct6775_data *data, u16 reg)
case nct6791:
case nct6792:
case nct6793:
+ num_tsi_regs = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
+ goto check;
This is unnecessarily pendantic. We did not do that for other chips
with different array sizes, and we should not start doing it for this
unless there is evidence that the same registers are 8-bit wide for
some of the chips (instead of being unused).
Ack, will fix in v2 -- thanks for the review.
Zev
