[AMD Official Use Only] Hi Guenter, Regards, Naveenk -----Original Message----- From: Guenter Roeck <groeck7@xxxxxxxxx> On Behalf Of Guenter Roeck Sent: Monday, July 26, 2021 3:07 AM To: Chatradhi, Naveen Krishna <NaveenKrishna.Chatradhi@xxxxxxx>; linux-hwmon@xxxxxxxxxxxxxxx Cc: Gupta, Akshay <Akshay.Gupta@xxxxxxx> Subject: Re: [PATCH v3 3/3] dt-bindings: sbrmi: Add SB-RMI hwmon driver bindings [CAUTION: External Email] On 7/19/21 10:57 PM, Naveen Krishna Chatradhi wrote: > From: Akshay Gupta <Akshay.Gupta@xxxxxxx> > > - Document device tree bindings for AMD SB-RMI emulated service. > > Signed-off-by: Akshay Gupta <Akshay.Gupta@xxxxxxx> > Signed-off-by: Naveen Krishna Chatradhi <nchatrad@xxxxxxx> Devicetree files need to be approved by a dt maintainer. They can't do that if they are not copied on devicetree patches. [naveenk:] Yes, my bad. Can I add the devicetree list now here or should I submit v4 of the patch-set with your reviewed-by on other 2 patches and copying the devicetree list. Guenter > --- > Changes since v2: > None > > .../devicetree/bindings/hwmon/amd,sbrmi.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml > > diff --git a/Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml > b/Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml > new file mode 100644 > index 000000000000..7598b083979c > --- /dev/null > +++ b/Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > +--- > +$id: > +https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi > +cetree.org%2Fschemas%2Fhwmon%2Famd%2Csbrmi.yaml%23&data=04%7C01%7 > +CNaveenKrishna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94fb456ac > +%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637628458245183191%7CUn > +known%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha > +WwiLCJXVCI6Mn0%3D%7C1000&sdata=Xwsc2G6T34oiV4aTzYLEb%2FLpoTj%2BW% > +2B6LmRkAFyeauQ8%3D&reserved=0 > +$schema: > +https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=04%7C01%7CNaveenKri > +shna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94fb456ac%7C3dd8961 > +fe4884e608e11a82d994e183d%7C0%7C0%7C637628458245183191%7CUnknown%7CTW > +FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI > +6Mn0%3D%7C1000&sdata=ieeFYJjYCyDzHrcGjvHWkkU6QHqXcBqOa4Kfsmqk3Ek% > +3D&reserved=0 > + > +title: > > + Sideband Remote Management Interface (SB-RMI) compliant > + AMD SoC power device. > + > +maintainers: > + - Akshay Gupta <Akshay.Gupta@xxxxxxx> > + > +description: | > + SB Remote Management Interface (SB-RMI) is an SMBus compatible > + interface that reports AMD SoC's Power (normalized Power) using, > + Mailbox Service Request and resembles a typical 8-pin remote power > + sensor's I2C interface to BMC. The power attributes in hwmon > + reports power in microwatts. > + > +properties: > + compatible: > + enum: > + - amd,sbrmi > + > + reg: > + maxItems: 1 > + description: | > + I2C bus address of the device as specified in Section SBI SMBus Address > + of the SoC register reference. The SB-RMI address is normally 78h for > + socket 0 and 70h for socket 1, but it could vary based on hardware > + address select pins. > + \[open source SoC register reference\] > + > + https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww > + w.amd.com%2Fen%2Fsupport%2Ftech-docs%3Fkeyword%3D55898&data=04%7 > + C01%7CNaveenKrishna.Chatradhi%40amd.com%7C8a8332e2358f4c37030d08d94f > + b456ac%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C6376284582451831 > + 91%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT > + iI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=eG384k%2FtNMNJD17u7qdIhjI > + p2sz%2B6Qs5PpAprL54saU%3D&reserved=0 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + i2c0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + sbrmi@3c { > + compatible = "amd,sbrmi"; > + reg = <0x3c>; > + }; > + }; > +... >
