On Tue, Jul 06, 2021 at 02:34:47PM +0000, Vincent Pelletier wrote: > From: "Opensource [Steve Twiss]" <stwiss.opensource@xxxxxxxxxxx> > > Dependencies required for DA9063 HWMON support. > > Signed-off-by: Opensource [Steve Twiss] <stwiss.opensource@xxxxxxxxxxx> > > Directly set da9063->t_offset. > Let MFD probe succeed even if DA9063_REG_T_OFFSET cannot be read. > > Signed-off-by: Vincent Pelletier <plr.vincent@xxxxxxxxx> > --- > Changes in v2: > - registers.h changes moved from patch 2 Please version your patch series. > > Originally submitted by Steve Twiss in 2014: > https://marc.info/?l=linux-kernel&m=139560864709852&w=2 > > drivers/mfd/da9063-core.c | 8 +++++++ > include/linux/mfd/da9063/core.h | 3 +++ > include/linux/mfd/da9063/registers.h | 34 ++++++++++++++++++++++++++++ > 3 files changed, 45 insertions(+) > > diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c > index df407c3afce3..14c2a8df9ae3 100644 > --- a/drivers/mfd/da9063-core.c > +++ b/drivers/mfd/da9063-core.c > @@ -197,6 +197,14 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq) > } > } > > + ret = regmap_read(da9063->regmap, DA9063_REG_T_OFFSET, &da9063->t_offset); > + if (ret < 0) { > + da9063->t_offset = 0; > + dev_warn(da9063->dev, > + "Temperature trimming value cannot be read (defaulting to 0)\n"); > + ret = 0; > + } > + > return ret; > } > > diff --git a/include/linux/mfd/da9063/core.h b/include/linux/mfd/da9063/core.h > index fa7a43f02f27..c0c57c6f6230 100644 > --- a/include/linux/mfd/da9063/core.h > +++ b/include/linux/mfd/da9063/core.h > @@ -85,6 +85,9 @@ struct da9063 { > int chip_irq; > unsigned int irq_base; > struct regmap_irq_chip_data *regmap_irq; > + > + /* Trimming */ > + int t_offset; > }; > > int da9063_device_init(struct da9063 *da9063, unsigned int irq); > diff --git a/include/linux/mfd/da9063/registers.h b/include/linux/mfd/da9063/registers.h > index 6e0f66a2e727..297631ddda39 100644 > --- a/include/linux/mfd/da9063/registers.h > +++ b/include/linux/mfd/da9063/registers.h > @@ -512,6 +512,7 @@ > > /* DA9063_REG_GPIO_0_1 (addr=0x15) */ > #define DA9063_GPIO0_PIN_MASK 0x03 > +#define DA9063_GPIO0_PIN_MASK_SHIFT 0 > #define DA9063_GPIO0_PIN_ADCIN1 0x00 > #define DA9063_GPIO0_PIN_GPI 0x01 > #define DA9063_GPIO0_PIN_GPO_OD 0x02 > @@ -523,6 +524,7 @@ > #define DA9063_GPIO0_TYPE_GPO_VDD_IO2 0x04 > #define DA9063_GPIO0_NO_WAKEUP 0x08 > #define DA9063_GPIO1_PIN_MASK 0x30 > +#define DA9063_GPIO1_PIN_MASK_SHIFT 4 > #define DA9063_GPIO1_PIN_ADCIN2_COMP 0x00 > #define DA9063_GPIO1_PIN_GPI 0x10 > #define DA9063_GPIO1_PIN_GPO_OD 0x20 > @@ -536,6 +538,7 @@ > > /* DA9063_REG_GPIO_2_3 (addr=0x16) */ > #define DA9063_GPIO2_PIN_MASK 0x03 > +#define DA9063_GPIO2_PIN_MASK_SHIFT 0 > #define DA9063_GPIO2_PIN_ADCIN3 0x00 > #define DA9063_GPIO2_PIN_GPI 0x01 > #define DA9063_GPIO2_PIN_GPO_PSS 0x02 > @@ -851,6 +854,7 @@ > #define DA9063_VSYS_VAL_BASE 0x00 > > /* DA9063_REG_ADC_RES_L (addr=0x37) */ > +#define DA9063_ADC_RES_L_SHIFT 6 > #define DA9063_ADC_RES_L_BITS 2 > #define DA9063_ADC_RES_L_MASK 0xC0 > > @@ -1014,6 +1018,36 @@ > #define DA9063_GPIO_DIM 0x80 > #define DA9063_GPIO_PWM_MASK 0x7F > > +/* DA9063_REG_ADC_CFG (addr=0xC9) */ > +#define DA9063_REG_ADCIN1_CUR_MASK 0x03 > +#define DA9063_REG_ADCIN1_CUR_SHIFT 0 > +#define DA9063_ADCIN1_CUR_1UA 0x00 > +#define DA9063_ADCIN1_CUR_2UA 0x01 > +#define DA9063_ADCIN1_CUR_10UA 0x02 > +#define DA9063_ADCIN1_CUR_40UA 0x03 > +#define DA9063_REG_ADCIN2_CUR_MASK 0x0C > +#define DA9063_REG_ADCIN2_CUR_SHIFT 2 > +#define DA9063_ADCIN2_CUR_1UA 0x00 > +#define DA9063_ADCIN2_CUR_2UA 0x01 > +#define DA9063_ADCIN2_CUR_10UA 0x02 > +#define DA9063_ADCIN2_CUR_40UA 0x03 > +#define DA9063_REG_ADCIN3_CUR_MASK 0x10 > +#define DA9063_REG_ADCIN3_CUR_SHIFT 4 > +#define DA9063_ADCIN3_CUR_10UA 0x00 > +#define DA9063_ADCIN3_CUR_40UA 0x01 > +#define DA9063_REG_ADCIN1_DEB_MASK 0x20 > +#define DA9063_REG_ADCIN1_DEB_SHIFT 5 > +#define DA9063_ADCIN1_DEB_OFF 0x00 > +#define DA9063_ADCIN1_DEB_ON 0x01 > +#define DA9063_REG_ADCIN2_DEB_MASK 0x40 > +#define DA9063_REG_ADCIN2_DEB_SHIFT 6 > +#define DA9063_ADCIN2_DEB_OFF 0x00 > +#define DA9063_ADCIN2_DEB_ON 0x01 > +#define DA9063_REG_ADCIN3_DEB_MASK 0x80 > +#define DA9063_REG_ADCIN3_DEB_SHIFT 7 > +#define DA9063_ADCIN3_DEB_OFF 0x00 > +#define DA9063_ADCIN3_DEB_ON 0x01 > + > /* DA9063_REG_CONFIG_H (addr=0x10D) */ > #define DA9063_PWM_CLK_MASK 0x01 > #define DA9063_PWM_CLK_PWM2MHZ 0x00 > -- > 2.32.0 >
