Hi, I've got a system using a PowerPC T2080 SoC and among other things has an LM81 hwmon chip. Under a high CPU load we see errant readings from the LM81 as well as actual failures. It's the errant readings that cause the most concern since we can easily ignore the read errors in our monitoring application (although it would be better if they weren't there at all). I'm able to reproduce this with a test application[0] that artificially creates a high CPU load then by repeatedly checking for the all-1s values from the LM81 datasheet[1](page 17). The all-1s readings stick out as they are obviously higher than the voltage rails that are connected and disagree with measurements taken with a multimeter. Here's the output from my device [root@linuxbox ~]# cpuload 90& [root@linuxbox ~]# (while true; do cat /sys/class/hwmon/hwmon0/in*_input | grep '3320\|4383\|6641\|15930\|3586'; sleep 1; done)& 3586 3586 cat: read error: No such device or address cat: read error: No such device or address 3320 3320 3586 3586 6641 6641 4383 4383 Fundamentally I think this is a problem with the fact that the LM81 is an SMBus device but the T2080 (and other Freescale SoCs) uses i2c and we emulate SMBus. I suspect the errant readings are when we don't get round to completing the read within the timeout specified by the SMBus specification. Depending on when that happens we either fail the transfer or interpret the result as all-1s. [0] - https://gist.github.com/cpackham/6356a3a943accebb228135dc10daf721 [1] - https://www.ti.com/lit/ds/symlink/lm81.pdf
