This commit adds Intel PECI client bindings document. Cc: Lee Jones <lee.jones@xxxxxxxxxx> Cc: Rob Herring <robh+dt@xxxxxxxxxx> Cc: Mark Rutland <mark.rutland@xxxxxxx> Cc: Andrew Jeffery <andrew@xxxxxxxx> Cc: James Feist <james.feist@xxxxxxxxxxxxxxx> Cc: Jason M Biils <jason.m.bills@xxxxxxxxxxxxxxx> Cc: Joel Stanley <joel@xxxxxxxxx> Cc: Vernon Mauery <vernon.mauery@xxxxxxxxxxxxxxx> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@xxxxxxxxxxxxxxx> --- Changes since v10: - Changed documents format to DT schema format so I dropped all review tags. Please review it again. .../bindings/mfd/intel,peci-client.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/intel,peci-client.yaml diff --git a/Documentation/devicetree/bindings/mfd/intel,peci-client.yaml b/Documentation/devicetree/bindings/mfd/intel,peci-client.yaml new file mode 100644 index 000000000000..7baddce0a92c --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/intel,peci-client.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/intel,peci-client.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel PECI Client Device Tree Bindings + +maintainers: + - Jae Hyun Yoo <jae.hyun.yoo@xxxxxxxxxxxxxxx> + +description: | + PECI (Platform Environment Control Interface) is a one-wire bus interface + that provides a communication channel from PECI clients in Intel processors + and chipset components to external monitoring or control devices. PECI is + designed to support the following sideband functions: + - Processor and DRAM thermal management + - Platform Manageability + - Processor Interface Tuning and Diagnostics + - Failure Analysis + +properties: + compatible: + const: intel,peci-client + + reg: + description: | + Address of a client CPU. According to the PECI specification, client + addresses start from 0x30. + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/ast2600-clock.h> + peci: bus@1e78b000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e78b000 0x60>; + + peci0: peci-bus@0 { + compatible = "aspeed,ast2600-peci"; + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; + resets = <&syscon ASPEED_RESET_PECI>; + clock-frequency = <24000000>; + + peci-client@30 { + compatible = "intel,peci-client"; + reg = <0x30>; + }; + + peci-client@31 { + compatible = "intel,peci-client"; + reg = <0x31>; + }; + }; + }; +... -- 2.17.1
