tree: https://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git watchdog-next head: 419c9ad9c6d4f211ee83d49e2ce6a876cbb1800f commit: c24a7cc9df8f17f0726daf9efc6aa290972009e9 [21/22] watchdog: rza_wdt: Support longer timeouts config: sparc64-allmodconfig (attached as .config) compiler: sparc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout c24a7cc9df8f17f0726daf9efc6aa290972009e9 # save the attached .config to linux build tree GCC_VERSION=7.2.0 make.cross ARCH=sparc64 All warnings (new ones prefixed by >>): drivers//watchdog/rza_wdt.c: In function 'rza_wdt_probe': >> drivers//watchdog/rza_wdt.c:197:14: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] priv->cks = (unsigned int)of_device_get_match_data(&pdev->dev); ^ vim +197 drivers//watchdog/rza_wdt.c 166 167 static int rza_wdt_probe(struct platform_device *pdev) 168 { 169 struct rza_wdt *priv; 170 struct resource *res; 171 unsigned long rate; 172 int ret; 173 174 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 175 if (!priv) 176 return -ENOMEM; 177 178 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 179 priv->base = devm_ioremap_resource(&pdev->dev, res); 180 if (IS_ERR(priv->base)) 181 return PTR_ERR(priv->base); 182 183 priv->clk = devm_clk_get(&pdev->dev, NULL); 184 if (IS_ERR(priv->clk)) 185 return PTR_ERR(priv->clk); 186 187 rate = clk_get_rate(priv->clk); 188 if (rate < 16384) { 189 dev_err(&pdev->dev, "invalid clock rate (%ld)\n", rate); 190 return -ENOENT; 191 } 192 193 priv->wdev.info = &rza_wdt_ident, 194 priv->wdev.ops = &rza_wdt_ops, 195 priv->wdev.parent = &pdev->dev; 196 > 197 priv->cks = (unsigned int)of_device_get_match_data(&pdev->dev); 198 if (priv->cks == CKS_4BIT) { 199 /* Assume slowest clock rate possible (CKS=0xF) */ 200 priv->wdev.max_timeout = (DIVIDER_4BIT * U8_MAX) / rate; 201 202 } else if (priv->cks == CKS_3BIT) { 203 /* Assume slowest clock rate possible (CKS=7) */ 204 rate /= DIVIDER_3BIT; 205 206 /* 207 * Since the max possible timeout of our 8-bit count 208 * register is less than a second, we must use 209 * max_hw_heartbeat_ms. 210 */ 211 priv->wdev.max_hw_heartbeat_ms = (1000 * U8_MAX) / rate; 212 dev_dbg(&pdev->dev, "max hw timeout of %dms\n", 213 priv->wdev.max_hw_heartbeat_ms); 214 } 215 216 priv->wdev.min_timeout = 1; 217 priv->wdev.timeout = DEFAULT_TIMEOUT; 218 219 watchdog_init_timeout(&priv->wdev, 0, &pdev->dev); 220 watchdog_set_drvdata(&priv->wdev, priv); 221 222 ret = devm_watchdog_register_device(&pdev->dev, &priv->wdev); 223 if (ret) 224 dev_err(&pdev->dev, "Cannot register watchdog device\n"); 225 226 return ret; 227 } 228 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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