RE: [PATCH v2 3/3] pinctrl: renesas: rzg2l: Avoid configuring ISEL in gpio_irq_{en,dis}able

[Biju Das <biju.das.jz@xxxxxxxxxxxxxx>]

+ IRQ chip

Cheers,
Biju

> -----Original Message-----
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Sent: Tuesday, February 6, 2024 1:53 PM
> To: Linus Walleij <linus.walleij@xxxxxxxxxx>
> Cc: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>; Geert Uytterhoeven
> <geert+renesas@xxxxxxxxx>; linux-renesas-soc@xxxxxxxxxxxxxxx; linux-
> gpio@xxxxxxxxxxxxxxx; Prabhakar Mahadev Lad <prabhakar.mahadev-
> lad.rj@xxxxxxxxxxxxxx>; biju.das.au <biju.das.au@xxxxxxxxx>
> Subject: [PATCH v2 3/3] pinctrl: renesas: rzg2l: Avoid configuring ISEL in
> gpio_irq_{en,dis}able
> 
> Currently on irq_disable(), we are disabling gpio interrupt enable(ISEL).
> That means the pin is just gpio input and not gpio input interrupt any
> more. So, move configuring ISEL in rzg2l_gpio_child_to_parent_hwirq()/
> rzg2l_gpio_irq_domain_free() so that pin will be gpioint always even
> during irq_disable().
> 
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v2:
>  * New patch.
> ---
>  drivers/pinctrl/renesas/pinctrl-rzg2l.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> index d400dcb048fc..4f979b7081c5 100644
> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -1836,22 +1836,18 @@ static void rzg2l_gpio_irq_endisable(struct
> rzg2l_pinctrl *pctrl,  static void rzg2l_gpio_irq_disable(struct irq_data
> *d)  {
>  	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> -	struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl,
> gpio_chip);
>  	unsigned int hwirq = irqd_to_hwirq(d);
> 
>  	irq_chip_disable_parent(d);
> -	rzg2l_gpio_irq_endisable(pctrl, hwirq, false);
>  	gpiochip_disable_irq(gc, hwirq);
>  }
> 
>  static void rzg2l_gpio_irq_enable(struct irq_data *d)  {
>  	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> -	struct rzg2l_pinctrl *pctrl = container_of(gc, struct rzg2l_pinctrl,
> gpio_chip);
>  	unsigned int hwirq = irqd_to_hwirq(d);
> 
>  	gpiochip_enable_irq(gc, hwirq);
> -	rzg2l_gpio_irq_endisable(pctrl, hwirq, true);
>  	irq_chip_enable_parent(d);
>  }
> 
> @@ -1933,6 +1929,7 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct
> gpio_chip *gc,
>  		goto err;
>  	}
> 
> +	rzg2l_gpio_irq_endisable(pctrl, child, true);
>  	pctrl->hwirq[irq] = child;
>  	irq += RZG2L_TINT_IRQ_START_INDEX;
> 
> @@ -1976,6 +1973,7 @@ static void rzg2l_gpio_irq_domain_free(struct
> irq_domain *domain, unsigned int v
> 
>  		for (i = 0; i < RZG2L_TINT_MAX_INTERRUPT; i++) {
>  			if (pctrl->hwirq[i] == hwirq) {
> +				rzg2l_gpio_irq_endisable(pctrl, hwirq, false);
>  				rzg2l_gpio_free(gc, hwirq);
>  				spin_lock_irqsave(&pctrl->bitmap_lock, flags);
>  				bitmap_release_region(pctrl->tint_slot, i,
> get_order(1));
> --
> 2.25.1