Re: [PATCH] dt-bindings: xilinx: replace Piyush Mehta maintainership

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On 1/19/24 12:36, Radhey Shyam Pandey wrote:
As Piyush is leaving AMD, he handed over ahci-ceva, ZynqMP Mode Pin GPIO
controller, Zynq UltraScale+ MPSoC and Versal reset, Xilinx SuperSpeed
DWC3 USB SoC controller, Microchip USB5744 4-port Hub Controller and
Xilinx udc controller maintainership duties to Mubin and Radhey.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxx>
---
  Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml      | 3 ++-
  .../devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml     | 3 ++-
  Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml | 3 ++-
  Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml         | 3 ++-
  Documentation/devicetree/bindings/usb/microchip,usb5744.yaml   | 3 ++-
  Documentation/devicetree/bindings/usb/xlnx,usb2.yaml           | 3 ++-
  6 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml b/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
index b29ce598f9aa..9952e0ef7767 100644
--- a/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
+++ b/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml
@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
  title: Ceva AHCI SATA Controller
maintainers:
-  - Piyush Mehta <piyush.mehta@xxxxxxx>
+  - Mubin Sayyed <mubin.sayyed@xxxxxxx>
+  - Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxx>
description: |
    The Ceva SATA controller mostly conforms to the AHCI interface with some
diff --git a/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
index b1fd632718d4..bb93baa88879 100644
--- a/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
+++ b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
@@ -12,7 +12,8 @@ description:
    PS_MODE). Every pin can be configured as input/output.
maintainers:
-  - Piyush Mehta <piyush.mehta@xxxxxxx>
+  - Mubin Sayyed <mubin.sayyed@xxxxxxx>
+  - Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxx>
properties:
    compatible:
diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
index 49db66801429..1f1b42dde94d 100644
--- a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
  title: Zynq UltraScale+ MPSoC and Versal reset
maintainers:
-  - Piyush Mehta <piyush.mehta@xxxxxxx>
+  - Mubin Sayyed <mubin.sayyed@xxxxxxx>
+  - Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxx>
description: |
    The Zynq UltraScale+ MPSoC and Versal has several different resets.
diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
index bb373eb025a5..00f87a558c7d 100644
--- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
+++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
  title: Xilinx SuperSpeed DWC3 USB SoC controller
maintainers:
-  - Piyush Mehta <piyush.mehta@xxxxxxx>
+  - Mubin Sayyed <mubin.sayyed@xxxxxxx>
+  - Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxx>
properties:
    compatible:
diff --git a/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml b/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml
index 6d4cfd943f58..445183d9d6db 100644
--- a/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml
+++ b/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml
@@ -16,8 +16,9 @@ description:
    USB 2.0 traffic.
maintainers:
-  - Piyush Mehta <piyush.mehta@xxxxxxx>
    - Michal Simek <michal.simek@xxxxxxx>
+  - Mubin Sayyed <mubin.sayyed@xxxxxxx>
+  - Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxx>
properties:
    compatible:
diff --git a/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml b/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml
index 868dffe314bc..a7f75fe36665 100644
--- a/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml
@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
  title: Xilinx udc controller
maintainers:
-  - Piyush Mehta <piyush.mehta@xxxxxxx>
+  - Mubin Sayyed <mubin.sayyed@xxxxxxx>
+  - Radhey Shyam Pandey <radhey.shyam.pandey@xxxxxxx>
properties:
    compatible:

Acked-by: Michal Simek <michal.simek@xxxxxxx>

Thanks,
Michal




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