On Fri, Jan 5, 2024 at 10:18 AM Chunyan Zhang <zhang.lyra@xxxxxxxxx> wrote: > > On Fri, 5 Jan 2024 at 10:11, wenhua lin <wenhua.lin1994@xxxxxxxxx> wrote: > > > > On Thu, Jan 4, 2024 at 9:00 PM Andy Shevchenko > > <andy.shevchenko@xxxxxxxxx> wrote: > > > > > > On Thu, Jan 4, 2024 at 4:43 AM Wenhua Lin <Wenhua.Lin@xxxxxxxxxx> wrote: > > > > > > > > The eic debounce does not have a clock of rtc_1k in the sleep state, > > > > but the eic debounce will be used to wake up the system, therefore the > > > > clock of rtc_1k needs to be kept open. > > > > > > ... > > > > > > > +#define SPRD_EIC_DBNC_FORCE_CLK 0x8000 > > > > > > BIT(15) ? > > > > > > > Yes, writing 1 to bit15 of the register can ensure that the clock of > > rtc_1k remains normally on. > > Andy's comment means that you should use BIT(15) instead of 0x8000. > OK, thank you very much for your explanation, I will make changes in patch v4. > > > > > -- > > > With Best Regards, > > > Andy Shevchenko