On Thu, Dec 7, 2023 at 8:08 AM Claudiu <claudiu.beznea@xxxxxxxxx> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> > > The GPIO controller available on RZ/G3S (but also on RZ/G2L) allows setting > the power source for Ethernet pins. Based on the interface b/w the Ethernet > controller and the Ethernet PHY and board design specific power source need > to be selected. The GPIO controller allows 1.8V, 2.5V and 3.3V power source > selection for Ethernet pins. This could be selected though ETHX_POC > registers (X={0, 1}). > > Commit adjust the driver to support this and does proper instantiation for > RZ/G3S and RZ/G2L SoC. On RZ/G2L only get operation has been tested at the > moment. > > While at it, as the power registers on RZ/G2L support access sizes of 8 > bits and RZ/G3S support access sizes of 8/16/32 bits, changed > writel()/readl() on these registers with writeb()/readb(). This should > allow using the same code for both SoCs w/o any issues. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> > --- > > Changes in v2: > - removed PVDD_MASK > - use 8 bit helpers to get/set value of power register > - replaced if/else with switch/case everywhere Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> i.e. will queue in renesas-pinctrl-for-v6.8. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds