On Sat, Sep 30, 2023 at 10:25 AM Duje Mihanović <duje.mihanovic@xxxxxxxx> wrote: > On Saturday, September 30, 2023 12:05:41 AM CEST Linus Walleij wrote: > > But it exists, so I can't say you can't use it. Not my choice. > > I understand it is convenient. > > > > It is possible to switch later, but only if you have a unique > > pin controller compatible so please add that. > > Maybe a dumb question. I might want to do this at some point to clean up the > device tree a bit, are there any such pinctrl drivers I can use as a > reference? Since it's Marvell after all (albeit a descendant of the 20 yo PXA platform!) I would expect new Marvell SoCs to be more alike the AC5 bindings that Chris Packham merged only last year: Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml Driver: drivers/pinctrl/mvebu/pinctrl-armada-xp.c drivers/pinctrl/mvebu/pinctrl-mvebu.c But if this pin controller is more related to PXA (Intel) hardware than to either Kirkwood or Armada, you might want to do something entirely different. It depends a bit on hardware. Hardware such as pinctrl-single.c with one mux configuration register per pin usually follow the Qualcomm way of doing things, which is to simply have one group per pin, then that can be associated with desired functions: Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml this has the upside of using all the standard bindings for bias etc. Driver: drivers/pinctrl/qcom/pinctrl-msm.c then qualcomm have subdrivers for each SoC calling into this so you have to check "real" bindings and drivers such as: Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml drivers/pinctrl/qcom/pinctrl-sm8550.c Yours, Linus Walleij