Re: [PATCH v3] pinctrl: tegra: Add support to display pin function

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Hello Prathamesh Shete,

On Fri, 14 Jul 2023 17:05:47 +0530
Prathamesh Shete <pshete@xxxxxxxxxx> wrote:

> The current function for a given pin is not displayed via the debugfs.
> Add support to display the current function that is set for each pin.
> 
> Signed-off-by: Prathamesh Shete <pshete@xxxxxxxxxx>
> Acked-by: Thierry Reding <treding@xxxxxxxxxx>
> Reviewed-by: Jon Hunter <jonathanh@xxxxxxxxxx>

While testing a Tegra20-based custom board I found a regression which
according to my bisecting appears starting with this patch (commit
d1cd5b51bc91 upstream).

The symptom is that i2c3 is not working anymore, the I2C lines being
always high. No other known issues at the moment.

The board is built around an Avionic Design Tamonten SOM:
arch/arm/boot/dts/nvidia/tegra20-tamonten.dtsi, which has in the
&state_default node:

    dtf {
        nvidia,pins = "dtf";
        nvidia,function = "i2c3";
    };

But on top of that the board dts has:
 
&state_default {
       dtf {
               nvidia,pins = "dtf";
               nvidia,function = "i2c3";
               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
               nvidia,tristate = <TEGRA_PIN_DISABLE>;
       };
};

> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
> index 4547cf66d03b..cb1d67239cd0 100644
> --- a/drivers/pinctrl/tegra/pinctrl-tegra.c
> +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
> @@ -96,6 +96,7 @@ static const struct cfg_param {
>  	{"nvidia,slew-rate-falling",	TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},
>  	{"nvidia,slew-rate-rising",	TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},
>  	{"nvidia,drive-type",		TEGRA_PINCONF_PARAM_DRIVE_TYPE},
> +	{"nvidia,function",		TEGRA_PINCONF_PARAM_FUNCTION},

FYI, I reduced your patch to only this line plus the one in the
pinctrl-tegra.h and the problem appears as well.

This is all the info I have at the moment. Can you provide more info on
what could be going on or how to investigate?

I am available to share more info as needed.

Best regards,
Luca

-- 
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com



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