From: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx> Add a new .dtsi file for sa8775p PMICs and add the four PMICs interfaced to the SoC via SPMI. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi | 37 +++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi new file mode 100644 index 000000000000..77e2515a7ab9 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023, Linaro Limited + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pmk8775_0: pmic@0 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + pmk8775_1: pmic@2 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x2 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + pmk8775_2: pmic@4 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; + + pmk8775_3: pmic@6 { + compatible = "qcom,pmm8654au", "qcom,spmi-pmic"; + reg = <0x6 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; -- 2.37.2