Hi Andy Shevchenko, Thanks for the feedback. > Subject: Re: [PATCH v6 06/13] drivers: pinctrl: renesas: Add RZ/G2L POEG > driver support > > On Tue, Mar 7, 2023 at 12:10 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > > > On Tue, Mar 7, 2023 at 10:53 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > wrote: > > > > > From: andy.shevchenko@xxxxxxxxx <andy.shevchenko@xxxxxxxxx> > > > > > Sent: Monday, March 6, 2023 11:36 PM Mon, Mar 06, 2023 at > > > > > 09:00:07AM > > > > > +0000, Biju Das kirjoitti: > > ... > > > > > > > +static void rzg2l_poeg_write(struct rzg2l_poeg_chip *chip, > > > > > > +u32 > > > > > > +data) { > > > > > > + iowrite32(data, chip->mmio); } > > > > > > + > > > > > > +static u32 rzg2l_poeg_read(struct rzg2l_poeg_chip *chip) { > > > > > > + return ioread32(chip->mmio); } > > > > > > > > > > Why not regmap MMIO? > > > > > > > > Some drivers used iowrite32, some uses writel, some uses regmap. > > > > > > > > will use regmap for read/write,If the preference is regmap MMIO as > > > > it comes with spinlock for MMIO access. > > > > > > Lock can be disabled. It's up to the user of regmap. > > > > Ok, Just want to double check, > > POEG has a single 32 bit register. So it worth to use regmap? > > A simple readl/write is sufficient no?? > > It can be. But can you explain why you used iowriteXX() / ioreadXX() instead > of writeX()/readX()? It is a mistake from my side. I have referred RZ/G2L BSP poeg driver code[1], initially and missed to change this. [1] https://github.com/renesas-rz/rz_linux-cip/blob/rz-5.10-cip17/drivers/pwm/poeg-rzg2l.c Cheers, Biju