From: Pandith N <pandith.n@xxxxxxxxx> This driver adds support for Elkhart Lake PSE GPIO controller, using Intel Tangier as a library driver. Signed-off-by: Pandith N <pandith.n@xxxxxxxxx> Co-developed-by: Raag Jadav <raag.jadav@xxxxxxxxx> Signed-off-by: Raag Jadav <raag.jadav@xxxxxxxxx> --- MAINTAINERS | 1 + drivers/gpio/Kconfig | 12 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-elkhartlake.c | 94 +++++++++++++++++++++++++++++++++ drivers/gpio/gpio-tangier.h | 5 ++ 5 files changed, 113 insertions(+) create mode 100644 drivers/gpio/gpio-elkhartlake.c diff --git a/MAINTAINERS b/MAINTAINERS index 3e9d42b2747d..aec1a2040f32 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10389,6 +10389,7 @@ M: Andy Shevchenko <andy@xxxxxxxxxx> L: linux-gpio@xxxxxxxxxxxxxxx S: Supported T: git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git +F: drivers/gpio/gpio-elkhartlake.c F: drivers/gpio/gpio-ich.c F: drivers/gpio/gpio-merrifield.c F: drivers/gpio/gpio-ml-ioh.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 7fc7a2768705..c60066d4cd72 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -242,6 +242,17 @@ config GPIO_DWAPB Say Y or M here to build support for the Synopsys DesignWare APB GPIO block. +config GPIO_ELKHARTLAKE + tristate "Intel Elkhart Lake PSE GPIO support" + depends on (X86 && ACPI) || COMPILE_TEST + select GPIO_TANGIER + help + Select this option to enable GPIO support for Intel Elkhart Lake + PSE GPIO IP. + + To compile this driver as a module, choose M here: the module will + be called gpio-elkhartlake. + config GPIO_EIC_SPRD tristate "Spreadtrum EIC support" depends on ARCH_SPRD || COMPILE_TEST @@ -632,6 +643,7 @@ config GPIO_TANGIER help GPIO support for Intel Tangier and compatible platforms. Currently supported: + - Elkhart Lake - Merrifield If built as a module its name will be gpio-tangier. diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index a6cea9d2c973..8c34d5e39eb8 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -54,6 +54,7 @@ obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o +obj-$(CONFIG_GPIO_ELKHARTLAKE) += gpio-elkhartlake.o obj-$(CONFIG_GPIO_EM) += gpio-em.o obj-$(CONFIG_GPIO_EN7523) += gpio-en7523.o obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o diff --git a/drivers/gpio/gpio-elkhartlake.c b/drivers/gpio/gpio-elkhartlake.c new file mode 100644 index 000000000000..cf728ff35857 --- /dev/null +++ b/drivers/gpio/gpio-elkhartlake.c @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Intel Elkhart Lake PSE GPIO driver + * + * Copyright (c) 2023 Intel Corporation. + * + * Authors: Pandith N <pandith.n@xxxxxxxxx> + * Raag Jadav <raag.jadav@xxxxxxxxx> + */ + +#include <linux/device.h> +#include <linux/err.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/pm.h> + +#include "gpio-tangier.h" + +/* Each Intel EHL PSE GPIO Controller has 30 GPIO pins */ +#define EHL_PSE_NGPIO 30 + +static int ehl_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct tng_gpio *priv; + int irq, ret; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->ctx = devm_kzalloc(dev, sizeof(*priv->ctx), GFP_KERNEL); + if (!priv->ctx) + return -ENOMEM; + + priv->reg_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->reg_base)) + return PTR_ERR(priv->reg_base); + + priv->dev = dev; + priv->chip.base = -1; + priv->chip.ngpio = EHL_PSE_NGPIO; + priv->chip.can_sleep = false; + priv->irq = irq; + + priv->reg.gwmr = GWMR_EHL; + priv->reg.gwsr = GWSR_EHL; + priv->reg.gsir = GSIR_EHL; + + ret = tng_gpio_probe(priv); + if (ret) + return dev_err_probe(dev, ret, "tng_gpio_probe error %d\n", ret); + + platform_set_drvdata(pdev, priv); + return 0; +} + +static int ehl_gpio_suspend(struct device *dev) +{ + return tng_gpio_suspend(dev); +} + +static int ehl_gpio_resume(struct device *dev) +{ + return tng_gpio_resume(dev); +} + +static DEFINE_SIMPLE_DEV_PM_OPS(ehl_gpio_pm_ops, ehl_gpio_suspend, ehl_gpio_resume); + +static const struct platform_device_id ehl_gpio_ids[] = { + { "gpio-elkhartlake" }, + { } +}; +MODULE_DEVICE_TABLE(platform, ehl_gpio_ids); + +static struct platform_driver ehl_gpio_driver = { + .driver = { + .name = "gpio-elkhartlake", + .pm = pm_sleep_ptr(&ehl_gpio_pm_ops), + }, + .probe = ehl_gpio_probe, + .id_table = ehl_gpio_ids, +}; +module_platform_driver(ehl_gpio_driver); + +MODULE_AUTHOR("Pandith N <pandith.n@xxxxxxxxx>"); +MODULE_AUTHOR("Raag Jadav <raag.jadav@xxxxxxxxx>"); +MODULE_DESCRIPTION("Intel Elkhart Lake PSE GPIO driver"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(GPIO_TANGIER); diff --git a/drivers/gpio/gpio-tangier.h b/drivers/gpio/gpio-tangier.h index 414530c60c5a..6390a14ed9de 100644 --- a/drivers/gpio/gpio-tangier.h +++ b/drivers/gpio/gpio-tangier.h @@ -18,6 +18,11 @@ struct device; +/* Elkhart Lake specific wake registers */ +#define GWMR_EHL 0x100 /* Wake mask */ +#define GWSR_EHL 0x118 /* Wake source */ +#define GSIR_EHL 0x130 /* Secure input */ + /* Merrifield specific wake registers */ #define GWMR_MRFLD 0x400 /* Wake mask */ #define GWSR_MRFLD 0x418 /* Wake source */ -- 2.17.1