On Mon, Jan 23, 2023 at 04:06:59PM +0000, Limonciello, Mario wrote: > > From: Raul Rangel <rrangel@xxxxxxxxxxxx> > > Sent: Monday, January 23, 2023 09:55 > > On Mon, Jan 23, 2023 at 8:03 AM Bartosz Golaszewski <brgl@xxxxxxxx> > > wrote: > > > On Sat, Jan 21, 2023 at 2:48 PM Mario Limonciello > > > <mario.limonciello@xxxxxxx> wrote: ... > > > > + /* avoid suspend issues with GPIOs when systems are using > > S3 */ > > > > + if (wake_capable && acpi_gbl_FADT.flags & > > ACPI_FADT_LOW_POWER_S0) > > > > *wake_capable = info.wake_capable; > > > > > > > > return irq; ... > > We still need to figure out a proper fix for this. If you read my post > > here: https://gitlab.freedesktop.org/drm/amd/-/issues/2357#note_1732372 > > I think we misinterpreted what the SharedAndWake bit is used for. To > > me it sounds like it's only valid for HW Reduced ACPI platforms, and > > S0ix. My changes made it so we call `dev_pm_set_wake_irq` when the > > Wake bit is set. Does anyone have any additional context on the Wake > > bit? I think we either need to make `dev_pm_set_wake_irq` (or a > > variant) only enable the wake on S0i3, or we can teach the ACPI > > subsystem to manage arming the IRQ's wake bit. Kind of like we already > > manage the GPE events for the device. > > There is an FADT flag for HW reduced (ACPI_FADT_HW_REDUCED). So > maybe something on top of my change to look at that too? > > IE: > if (wake_capable && (acpi_gbl_FADT.flags & (ACPI_FADT_LOW_POWER_S0 | ACPI_FADT_HW_REDUCED) I'm not sure why we are talking about HW reduced case? In HP reduced case IIRC the GPE are absent as a class. -- With Best Regards, Andy Shevchenko