RE: [PATCH 1/5] dt-bindings: gpio: Add RZ/V2M PWC GPIO driver bindings

[Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>]

Hi Rob,

Thanks for the feedback.

> From: Rob Herring <robh@xxxxxxxxxx>
> Sent: 14 December 2022 16:11
> To: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>
> Subject: Re: [PATCH 1/5] dt-bindings: gpio: Add RZ/V2M PWC GPIO driver
> bindings
> 
> On Tue, Dec 13, 2022 at 10:43:06PM +0000, Fabrizio Castro wrote:
> > Add dt-bindings document for the RZ/V2M PWC GPIO driver.
> 
> Bindings are for h/w blocks/devices, not a specific driver.

Right, I'll be more careful next time.

> 
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>
> > ---
> >  .../bindings/gpio/renesas,rzv2m-pwc-gpio.yaml | 62 +++++++++++++++++++
> >  1 file changed, 62 insertions(+)
> >  create mode 100644
> Documentation/devicetree/bindings/gpio/renesas,rzv2m-pwc-gpio.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/gpio/renesas,rzv2m-pwc-
> gpio.yaml b/Documentation/devicetree/bindings/gpio/renesas,rzv2m-pwc-
> gpio.yaml
> > new file mode 100644
> > index 000000000000..ecc034d53259
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/gpio/renesas,rzv2m-pwc-gpio.yaml
> > @@ -0,0 +1,62 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +
> > +title: Renesas RZ/V2M External Power Sequence Controller (PWC) GPIO
> > +
> > +description: |+
> > +  The PWC IP found in the RZ/V2M family of chips comes with General-
> Purpose
> > +  Output pins, alongside the below functions
> > +    - external power supply on/off sequence generation
> > +    - on/off signal generation for the LPDDR4 core power supply (LPVDD)
> > +    - key input signals processing
> > +  This node uses syscon to map the register used to control the GPIOs
> > +  (the register map is retrieved from the parent dt-node), and the node
> should
> > +  be represented as a sub node of a "syscon", "simple-mfd" node.
> > +
> > +maintainers:
> > +  - Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - renesas,r9a09g011-pwc-gpio # RZ/V2M
> > +          - renesas,r9a09g055-pwc-gpio # RZ/V2MA
> > +      - const: renesas,rzv2m-pwc-gpio
> > +
> > +  offset:
> 
> Too generic of a name. We want any given property name (globally) to
> have 1 type. With the below comment, this should be replaced with 'reg'
> instead if you have child nodes.

I'll take it out

> 
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    description: |
> > +      Offset in the register map for controlling the GPIOs (in bytes).
> > +
> > +  regmap:
> > +    $ref: /schemas/types.yaml#/definitions/phandle
> > +    description: Phandle to the register map node.
> 
> Looks like GPIO is a sub-function of some other block. Define the
> binding for that entire block. GPIO can be either either a function of
> that node (just add GPIO provider properties) or you can have GPIO child
> nodes. Depends on what the entire block looks like to decide. Do you
> have multiple instances of the GPIO block would be one reason to have
> child nodes.

I'll take out this child node.

Thanks,
Fab

> 
> > +
> > +  gpio-controller: true
> > +
> > +  '#gpio-cells':
> > +    const: 2
> > +
> > +required:
> > +  - compatible
> > +  - regmap
> > +  - offset
> > +  - gpio-controller
> > +  - '#gpio-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    gpio {
> > +            compatible = "renesas,r9a09g011-pwc-gpio",
> > +                         "renesas,rzv2m-pwc-gpio";
> > +            regmap = <&regmapnode>;
> > +            offset = <0x80>;
> > +            gpio-controller;
> > +            #gpio-cells = <2>;
> > +    };
> > --
> > 2.34.1
> >
> >