On Wed, Dec 07, 2022 at 11:36:37PM +0200, Andy Shevchenko wrote: > On Thu, Dec 08, 2022 at 12:33:56AM +0800, larry.lai wrote: > > The UP board <http://www.upboard.com> is the computer board for > > Professional Makers and Industrial Applications. We want to upstream > > the UP board 40-pin GP-bus Kernel driver for giving the users better > > experience on the software release. (not just download from UP board > > github) > > > > These patches are generated from the Linux kernel mainline tag v6.0. > > I have just checked the v3 (previous version of this) and I haven't found any > evidence that I gave my tag or permission to use it. What the heck is going on > here?! NAK to this series. -- With Best Regards, Andy Shevchenko
Re: [RFC 0/3] Add support control UP board CPLD/FPGA pin control
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- Subject: Re: [RFC 0/3] Add support control UP board CPLD/FPGA pin control
- From: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
- Date: Wed, 7 Dec 2022 23:38:50 +0200
- In-reply-to: <Y5EHZX8xHDSjG3FI@smile.fi.intel.com>
- Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
- References: <20221207163359.26564-1-larry.lai@yunjingtech.com> <Y5EHZX8xHDSjG3FI@smile.fi.intel.com>
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- [RFC 0/3] Add support control UP board CPLD/FPGA pin control
- From: larry.lai
- Re: [RFC 0/3] Add support control UP board CPLD/FPGA pin control
- From: Andy Shevchenko
- [RFC 0/3] Add support control UP board CPLD/FPGA pin control
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