Re: [PATCH RFC 2/5] pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts

["Lad, Prabhakar" <prabhakar.csengg@xxxxxxxxx>]

Hi Biju,

On Tue, Nov 8, 2022 at 7:14 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
>
> > Subject: [PATCH RFC 2/5] pinctrl: renesas: rzg2l: Fix configuring the GPIO
> > pins as interrupts
> >
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > On the RZ/G2UL SoC we have less number of pins compared to RZ/G2L and also
> > the pin configs are completely different. This patch makes sure we use the
> > appropriate pin configs for each SoC (which is passed as part of the OF
> > data) while configuring the GPIO pin as interrupts instead of using
> > rzg2l_gpio_configs[] for all the SoCs.
> >
>
> Looks like you are missing fixes tag.
> Fixes: db2e5f21a48ed ("pinctrl: renesas: pinctrl-rzg2l: Add IRQ domain to handle GPIO interrupt")
>
I did think about but then I realised this fixes the GPIO IRQ
functions only and we didn't support IRQC and GPIO interrupts up until
now so I hadn't added the fixes tag.

Cheers,
Prabhakar