Il 05/10/22 19:43, Yassine Oudjana ha scritto:
From: Yassine Oudjana <y.oudjana@xxxxxxxxxxxxxx> Add a driver for the MediaTek MT6735 SoC pin controller. This driver also supports the pin controller on MT6735M, which lacks 6 physical pins (198-203) used for MSDC2 on MT6735. Signed-off-by: Yassine Oudjana <y.oudjana@xxxxxxxxxxxxxx> --- MAINTAINERS | 8 + drivers/pinctrl/mediatek/Kconfig | 6 + drivers/pinctrl/mediatek/Makefile | 1 + drivers/pinctrl/mediatek/pinctrl-mt6735.c | 584 +++ drivers/pinctrl/mediatek/pinctrl-mtk-mt6735.h | 3993 +++++++++++++++++ 5 files changed, 4592 insertions(+) create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt6735.c create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt6735.h
..snip..
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt6735.c b/drivers/pinctrl/mediatek/pinctrl-mt6735.c new file mode 100644 index 000000000000..dd9dad9cb142 --- /dev/null +++ b/drivers/pinctrl/mediatek/pinctrl-mt6735.c @@ -0,0 +1,584 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022 Yassine Oudjana <y.oudjana@xxxxxxxxxxxxxx> + */ + +#include <linux/platform_device.h> +#include <linux/regmap.h> + +#include "pinctrl-mtk-mt6735.h" +#include "pinctrl-paris.h" +
..snip..
+ +/* Pin group registers */ +#define GPIO_IES 0x000 +#define GPIO_SMT 0x010 +#define GPIO_TDSEL0 0x020 +#define GPIO_TDSEL1 0x024
This is the only reason why I can't give you a Reviewed-by, and I'm sad about that. Please fix that tabulation after #define.
+#define GPIO_RDSEL0 0x028 +#define GPIO_RDSEL1 0x02c +#define GPIO_PULLEN0 0x030 +#define GPIO_PULLEN1 0x040 +#define GPIO_PULLSEL0 0x050 +#define GPIO_PULLSEL1 0x060 +#define GPIO_DRV0 0x070 +#define GPIO_DRV1 0x074
...and same here.
+#define GPIO_PUPD0 0x080 +#define GPIO_PUPD1 0x090 +
Thanks, Angelo
