On Fri, Sep 02, 2022 at 09:42:21AM +0300, Andy Shevchenko wrote: > On Wed, Aug 31, 2022 at 9:02 AM Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> wrote: > > > > This driver implements a GPIO multiplexer based on latches connected to > > other GPIOs. A set of data GPIOs is connected to the data input of > > multiple latches. The clock input of each latch is driven by another > > set of GPIOs. With two 8-bit latches 10 GPIOs can be multiplexed into > > 16 GPIOs. GPOs might be a better term as in fact the multiplexed pins > > are output only. > > So, this is for only one type of latches, now I'm wondering why > gpio-74xx-mmio can't cover this case (with probably small > modifications to the code)? gpio-74xx-mmio is about latches connected to a parallel bus. You can access the GPIOs by doing readl/writel operations. The latches are driven by the bus logic and likely an additional address decoder. What I have here instead is a latch fully driven by GPIOs. Yes, with enough force you could implement it in the gpio-74xx-mmio driver, but that wouldn't be mmio at all and likely completely different code pathes. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |