Add 'clock-names' for gpio nodes on rk356x SoCs, after this patch, the gpio driver can get the clocks by a const char id, 'bus' for apb clock and 'db' for the debounce clock. Signed-off-by: Jianqun Xu <jay.xu@xxxxxxxxxxxxxx> --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 319981c3e9f7..66d038720e65 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1650,6 +1650,7 @@ gpio0: gpio@fdd60000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfdd60000 0x0 0x100>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "bus", "db"; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; gpio-controller; #gpio-cells = <2>; @@ -1661,6 +1662,7 @@ gpio1: gpio@fe740000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfe740000 0x0 0x100>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "bus", "db"; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; #gpio-cells = <2>; @@ -1672,6 +1674,7 @@ gpio2: gpio@fe750000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfe750000 0x0 0x100>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "bus", "db"; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; #gpio-cells = <2>; @@ -1683,6 +1686,7 @@ gpio3: gpio@fe760000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfe760000 0x0 0x100>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "bus", "db"; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; #gpio-cells = <2>; @@ -1694,6 +1698,7 @@ gpio4: gpio@fe770000 { compatible = "rockchip,gpio-bank"; reg = <0x0 0xfe770000 0x0 0x100>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "bus", "db"; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; #gpio-cells = <2>; -- 2.25.1