Re: [PATCH v1 1/1] gpio: rockchip: Switch to use fwnode instead of of_node

[kernel test robot <lkp@xxxxxxxxx>]

Hi Andy,

I love your patch! Yet something to improve:

[auto build test ERROR on rockchip/for-next]
[also build test ERROR on linus/master v6.0-rc3 next-20220830]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Andy-Shevchenko/gpio-rockchip-Switch-to-use-fwnode-instead-of-of_node/20220831-032131
base:   https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: hexagon-randconfig-r032-20220830 (https://download.01.org/0day-ci/archive/20220831/202208310629.1JjkyeRu-lkp@xxxxxxxxx/config)
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project c7df82e4693c19e3fd2e25c83eb04d9deb7b7b59)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/678cf6450de6a016c041c3cd2ce58d1383d070e6
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Andy-Shevchenko/gpio-rockchip-Switch-to-use-fwnode-instead-of-of_node/20220831-032131
        git checkout 678cf6450de6a016c041c3cd2ce58d1383d070e6
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/gpio/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All errors (new ones prefixed by >>):

>> drivers/gpio/gpio-rockchip.c:614:8: error: use of undeclared identifier 'pctlnp'
                   if (!pctlnp)
                        ^
   1 error generated.


vim +/pctlnp +614 drivers/gpio/gpio-rockchip.c

936ee2675eee1f Jianqun Xu      2021-08-16  579  
936ee2675eee1f Jianqun Xu      2021-08-16  580  static int rockchip_gpiolib_register(struct rockchip_pin_bank *bank)
936ee2675eee1f Jianqun Xu      2021-08-16  581  {
936ee2675eee1f Jianqun Xu      2021-08-16  582  	struct gpio_chip *gc;
936ee2675eee1f Jianqun Xu      2021-08-16  583  	int ret;
936ee2675eee1f Jianqun Xu      2021-08-16  584  
936ee2675eee1f Jianqun Xu      2021-08-16  585  	bank->gpio_chip = rockchip_gpiolib_chip;
936ee2675eee1f Jianqun Xu      2021-08-16  586  
936ee2675eee1f Jianqun Xu      2021-08-16  587  	gc = &bank->gpio_chip;
936ee2675eee1f Jianqun Xu      2021-08-16  588  	gc->base = bank->pin_base;
936ee2675eee1f Jianqun Xu      2021-08-16  589  	gc->ngpio = bank->nr_pins;
936ee2675eee1f Jianqun Xu      2021-08-16  590  	gc->label = bank->name;
936ee2675eee1f Jianqun Xu      2021-08-16  591  	gc->parent = bank->dev;
936ee2675eee1f Jianqun Xu      2021-08-16  592  
936ee2675eee1f Jianqun Xu      2021-08-16  593  	ret = gpiochip_add_data(gc, bank);
936ee2675eee1f Jianqun Xu      2021-08-16  594  	if (ret) {
936ee2675eee1f Jianqun Xu      2021-08-16  595  		dev_err(bank->dev, "failed to add gpiochip %s, %d\n",
936ee2675eee1f Jianqun Xu      2021-08-16  596  			gc->label, ret);
936ee2675eee1f Jianqun Xu      2021-08-16  597  		return ret;
936ee2675eee1f Jianqun Xu      2021-08-16  598  	}
936ee2675eee1f Jianqun Xu      2021-08-16  599  
936ee2675eee1f Jianqun Xu      2021-08-16  600  	/*
936ee2675eee1f Jianqun Xu      2021-08-16  601  	 * For DeviceTree-supported systems, the gpio core checks the
936ee2675eee1f Jianqun Xu      2021-08-16  602  	 * pinctrl's device node for the "gpio-ranges" property.
936ee2675eee1f Jianqun Xu      2021-08-16  603  	 * If it is present, it takes care of adding the pin ranges
936ee2675eee1f Jianqun Xu      2021-08-16  604  	 * for the driver. In this case the driver can skip ahead.
936ee2675eee1f Jianqun Xu      2021-08-16  605  	 *
936ee2675eee1f Jianqun Xu      2021-08-16  606  	 * In order to remain compatible with older, existing DeviceTree
936ee2675eee1f Jianqun Xu      2021-08-16  607  	 * files which don't set the "gpio-ranges" property or systems that
936ee2675eee1f Jianqun Xu      2021-08-16  608  	 * utilize ACPI the driver has to call gpiochip_add_pin_range().
936ee2675eee1f Jianqun Xu      2021-08-16  609  	 */
678cf6450de6a0 Andy Shevchenko 2022-08-30  610  	if (!fwnode_property_read_bool(bank->fwnode, "gpio-ranges")) {
678cf6450de6a0 Andy Shevchenko 2022-08-30  611  		struct fwnode_handle *parent = fwnode_get_parent(bank->fwnode);
936ee2675eee1f Jianqun Xu      2021-08-16  612  		struct pinctrl_dev *pctldev = NULL;
936ee2675eee1f Jianqun Xu      2021-08-16  613  
936ee2675eee1f Jianqun Xu      2021-08-16 @614  		if (!pctlnp)
936ee2675eee1f Jianqun Xu      2021-08-16  615  			return -ENODATA;
936ee2675eee1f Jianqun Xu      2021-08-16  616  
678cf6450de6a0 Andy Shevchenko 2022-08-30  617  		pctldev = of_pinctrl_get(to_of_node(parent));
936ee2675eee1f Jianqun Xu      2021-08-16  618  		if (!pctldev)
936ee2675eee1f Jianqun Xu      2021-08-16  619  			return -ENODEV;
936ee2675eee1f Jianqun Xu      2021-08-16  620  
936ee2675eee1f Jianqun Xu      2021-08-16  621  		ret = gpiochip_add_pin_range(gc, dev_name(pctldev->dev), 0,
936ee2675eee1f Jianqun Xu      2021-08-16  622  					     gc->base, gc->ngpio);
936ee2675eee1f Jianqun Xu      2021-08-16  623  		if (ret) {
936ee2675eee1f Jianqun Xu      2021-08-16  624  			dev_err(bank->dev, "Failed to add pin range\n");
936ee2675eee1f Jianqun Xu      2021-08-16  625  			goto fail;
936ee2675eee1f Jianqun Xu      2021-08-16  626  		}
936ee2675eee1f Jianqun Xu      2021-08-16  627  	}
936ee2675eee1f Jianqun Xu      2021-08-16  628  
936ee2675eee1f Jianqun Xu      2021-08-16  629  	ret = rockchip_interrupts_register(bank);
936ee2675eee1f Jianqun Xu      2021-08-16  630  	if (ret) {
936ee2675eee1f Jianqun Xu      2021-08-16  631  		dev_err(bank->dev, "failed to register interrupt, %d\n", ret);
936ee2675eee1f Jianqun Xu      2021-08-16  632  		goto fail;
936ee2675eee1f Jianqun Xu      2021-08-16  633  	}
936ee2675eee1f Jianqun Xu      2021-08-16  634  
936ee2675eee1f Jianqun Xu      2021-08-16  635  	return 0;
936ee2675eee1f Jianqun Xu      2021-08-16  636  
936ee2675eee1f Jianqun Xu      2021-08-16  637  fail:
936ee2675eee1f Jianqun Xu      2021-08-16  638  	gpiochip_remove(&bank->gpio_chip);
936ee2675eee1f Jianqun Xu      2021-08-16  639  
936ee2675eee1f Jianqun Xu      2021-08-16  640  	return ret;
936ee2675eee1f Jianqun Xu      2021-08-16  641  }
936ee2675eee1f Jianqun Xu      2021-08-16  642  

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