On 7/26/22 00:30, Linus Walleij wrote:
On Mon, Jul 25, 2022 at 10:38 PM Andy Shevchenko
<andy.shevchenko@xxxxxxxxx> wrote:
On Mon, Jul 25, 2022 at 12:51 AM Marek Vasut <marex@xxxxxxx> wrote:
The driver currently performs register read-modify-write without locking
in its irqchip part, this could lead to a race condition when configuring
interrupt mode setting. Add the missing bgpio spinlock lock/unlock around
the register read-modify-write.
...
+ spin_lock_irqsave(&port->gc.bgpio_lock, flags);
To my surprise, is bgpio_lock not a raw spin lock?! How is it possible
to work on RT?
It's a spinlock that is used both for the GPIO and irqchips, so if the
GPIO doesn't have an irqchip it works fine, as only IRQs are
problematic.
If the registers used by the irqchip are separate from the registers
used by the GPIO access, I think it is wise to use a separate
raw spinlock to just protect the IRQ registers.
They really only need to share a spinlock if they use the same
registers and the gpiochip and irqchip risk stepping on each
others toes. That doesn't seem to be the case here?
Marek: could you see if the irqchip part of the driver could
use its own raw spinlock?
It cannot, because of the GDIR register which is shared between the
gpiochip and irqchip.
