Ping... BR > Subject: [PATCH] pinctrl: imx: Add the zero base flag for imx93 > > On i.MX93, the pin mux reg offset is from 0x0, so need to add the > 'ZERO_OFFSET_VALID' flag to make sure the pin at mux offset 0 can be found. > > Signed-off-by: Jacky Bai <ping.bai@xxxxxxx> > --- > drivers/pinctrl/freescale/pinctrl-imx93.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pinctrl/freescale/pinctrl-imx93.c > b/drivers/pinctrl/freescale/pinctrl-imx93.c > index c0630f69e995..417e41b37a6f 100644 > --- a/drivers/pinctrl/freescale/pinctrl-imx93.c > +++ b/drivers/pinctrl/freescale/pinctrl-imx93.c > @@ -239,6 +239,7 @@ static const struct pinctrl_pin_desc > imx93_pinctrl_pads[] = { static const struct imx_pinctrl_soc_info > imx93_pinctrl_info = { > .pins = imx93_pinctrl_pads, > .npins = ARRAY_SIZE(imx93_pinctrl_pads), > + .flags = ZERO_OFFSET_VALID, > .gpr_compatible = "fsl,imx93-iomuxc-gpr", }; > > -- > 2.25.1