On Thu, Apr 21, 2022 at 4:08 PM Marek Vasut <marex@xxxxxxx> wrote: > The current EOI handler for LEVEL triggered interrupts calls clk_enable(), > register IO, clk_disable(). The clock manipulation requires locking which > happens with IRQs disabled in clk_enable_lock(). Instead of turning the > clock on and off all the time, enable the clock in case LEVEL interrupt is > requested and keep the clock enabled until all LEVEL interrupts are freed. > The LEVEL interrupts are an exception on this platform and seldom used, so > this does not affect the common case. > > This simplifies the LEVEL interrupt handling considerably and also fixes > the following splat found when using preempt-rt: > ------------[ cut here ]------------ > WARNING: CPU: 0 PID: 0 at kernel/locking/rtmutex.c:2040 __rt_mutex_trylock+0x37/0x62 > Modules linked in: > CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.109-rt65-stable-standard-00068-g6a5afc4b1217 #85 > Hardware name: STM32 (Device Tree Support) > [<c010a45d>] (unwind_backtrace) from [<c010766f>] (show_stack+0xb/0xc) > [<c010766f>] (show_stack) from [<c06353ab>] (dump_stack+0x6f/0x84) > [<c06353ab>] (dump_stack) from [<c01145e3>] (__warn+0x7f/0xa4) > [<c01145e3>] (__warn) from [<c063386f>] (warn_slowpath_fmt+0x3b/0x74) > [<c063386f>] (warn_slowpath_fmt) from [<c063b43d>] (__rt_mutex_trylock+0x37/0x62) > [<c063b43d>] (__rt_mutex_trylock) from [<c063c053>] (rt_spin_trylock+0x7/0x16) > [<c063c053>] (rt_spin_trylock) from [<c036a2f3>] (clk_enable_lock+0xb/0x80) > [<c036a2f3>] (clk_enable_lock) from [<c036ba69>] (clk_core_enable_lock+0x9/0x18) > [<c036ba69>] (clk_core_enable_lock) from [<c034e9f3>] (stm32_gpio_get+0x11/0x24) > [<c034e9f3>] (stm32_gpio_get) from [<c034ef43>] (stm32_gpio_irq_trigger+0x1f/0x48) > [<c034ef43>] (stm32_gpio_irq_trigger) from [<c014aa53>] (handle_fasteoi_irq+0x71/0xa8) > [<c014aa53>] (handle_fasteoi_irq) from [<c0147111>] (generic_handle_irq+0x19/0x22) > [<c0147111>] (generic_handle_irq) from [<c014752d>] (__handle_domain_irq+0x55/0x64) > [<c014752d>] (__handle_domain_irq) from [<c0346f13>] (gic_handle_irq+0x53/0x64) > [<c0346f13>] (gic_handle_irq) from [<c0100ba5>] (__irq_svc+0x65/0xc0) > Exception stack(0xc0e01f18 to 0xc0e01f60) > 1f00: 0000300c 00000000 > 1f20: 0000300c c010ff01 00000000 00000000 c0e00000 c0e07714 00000001 c0e01f78 > 1f40: c0e07758 00000000 ef7cd0ff c0e01f68 c010554b c0105542 40000033 ffffffff > [<c0100ba5>] (__irq_svc) from [<c0105542>] (arch_cpu_idle+0xc/0x1e) > [<c0105542>] (arch_cpu_idle) from [<c063be95>] (default_idle_call+0x21/0x3c) > [<c063be95>] (default_idle_call) from [<c01324f7>] (do_idle+0xe3/0x1e4) > [<c01324f7>] (do_idle) from [<c01327b3>] (cpu_startup_entry+0x13/0x14) > [<c01327b3>] (cpu_startup_entry) from [<c0a00c13>] (start_kernel+0x397/0x3d4) > [<c0a00c13>] (start_kernel) from [<00000000>] (0x0) > ---[ end trace 0000000000000002 ]--- > > Power consumption measured on STM32MP157C DHCOM SoM is not increased or > is below noise threshold. > > Fixes: 47beed513a85b ("pinctrl: stm32: Add level interrupt support to gpio irq chip") > Signed-off-by: Marek Vasut <marex@xxxxxxx> > Cc: Alexandre Torgue <alexandre.torgue@xxxxxxxxxxx> > Cc: Fabien Dessenne <fabien.dessenne@xxxxxxxxxxx> > Cc: Linus Walleij <linus.walleij@xxxxxxxxxx> > Cc: Marc Zyngier <maz@xxxxxxxxxx> > Cc: linux-stm32@xxxxxxxxxxxxxxxxxxxxxxxxxxxx > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > To: linux-gpio@xxxxxxxxxxxxxxx Patch applied to fixes, tweaked subject to pinctrl: stm32: Yours, Linus Walleij