[libgpiod] enlarge gpiochip label size

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Dear Community!

We use in our product an Arria10 SoC where we place several Intel/Alter PIOs in the FPGA design.
These GPIOs are accessible using the corresponding device-tree entries
...
       label: gpio@0x130 {
              compatible = "altr,pio-18.1", "altr,pio-1.0";
              reg = <0x00000130 0x00000010>;
              altr,gpio-bank-width = <2>;
              resetvalue = <0>;
              #gpio-cells = <2>;
              gpio-controller;
       };
...

We use also the libgpiod framework to control the lines.
However, there is a problem with the generated label attribute of the gpiochip.
In case the gpio-controller is instantiated via device-tree like gpio-altera.c, it calls the common of_mm_gpiochip_add_data() function which fills the label as:
...
gc->label = kasprintf(GFP_KERNEL, "%pOF", np);
...
That generates a kind of "top-down path" to the gpio-controller itself, that is usually longer than 32 characters.
As a result a simple gpiodetect call will print the following output:
...
gpiochip0 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip1 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip10 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip11 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip12 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip13 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip14 [ffc02900.gpio] (29 lines)
gpiochip2 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip3 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip4 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip5 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip6 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip7 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip8 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
gpiochip9 [/soc/bridge@0xc0000000/gpio@0x1] (32 lines)
...
As you can see - due to missing endings - it is almost impossible to determine which gpiochipX is which entry in the device-tree.

The 32 character wide limitation are defined in two places: one in the kernel UAPI header file and one in the core.c file of the libgpiod library.
Since this information is passed through the ioctl interface both occurrences must be changed at the same time.
I'm attaching the corresponding 2 patch files.
After the modification the gpiodetect prints the labels (paths) correctly:
...
gpiochip0 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0xa0] (32 lines)
gpiochip1 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0xb0] (32 lines)
gpiochip10 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x190] (32 lines)
gpiochip11 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x1a0] (32 lines)
gpiochip12 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x1b0] (32 lines)
gpiochip13 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x280] (32 lines)
gpiochip14 [ffc02900.gpio] (29 lines)
gpiochip2 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0xc0] (32 lines)
gpiochip3 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0xd0] (32 lines)
gpiochip4 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x130] (32 lines)
gpiochip5 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x120] (32 lines)
gpiochip6 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x170] (32 lines)
gpiochip7 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x160] (32 lines)
gpiochip8 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x150] (32 lines)
gpiochip9 [/soc/bridge@0xc0000000/bridge@0x001000000/gpio@0x180] (32 lines)
...

Do you think that it is worth to add to the mainline source code?

Best regards
Attila


__________________________________________________
Attila Hannibál
Lead Software Engineer
Electronics and Embedded Systems

HEITEC Hungary Kft.
Kaposvár utca 14-18
H-1117 Budapest

Phone: +36 1 551 5153
Fax:     +36 1 551 5279
E-Mail:   mailto:attila.hannibal@xxxxxxxxx
Internet: https://www.heitec.hu


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Attachment: 0006-label-size-increased.patch
Description: 0006-label-size-increased.patch

Attachment: 0001-label-size-increased.patch
Description: 0001-label-size-increased.patch


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